Compiler/TMS320C6713B: Accessing to ICR, IFR by C code

Koichiro Tashiro

Part Number: TMS320C6713B

Tool/software: TI C/C++ Compiler

Hi,

I have a question from my customer who is using TMS320C6713B.

Customer wants to clear an individual interrupt bits in ICR as described in User’s Guide section 5.3.2.
http://www.ti.com/lit/ug/spru733a/spru733a.pdf

The example shows the assembly code, but customer wants C source example.
I understood below keyword should be used to reference control registers.

extern __cregister volatile unsigned int IFR;
extern __cregister volatile unsigned int ICR;

But it is not clear for me the compiler properly generates MVC instruction.
For example, below C code

ICR = 0x40

is translated to below assembly code including NOP (delay slot) ?

 MVK 40h, B3
 MVC B3, ICR
 NOP

Thanks and regards,
Koichiro Tashiro

over 6 years ago

0 George Mock over 6 years ago

TI__Guru**** 251220 points

If you want to generate the same code as in example 5-7 in that device Reference Guide, then you need to write this C code ...

#include <c6x.h>

...


   /* Set a bit in ICR to clear the interrupt */
   ICR = 0x40;
   /* Read the flag register                  */
   IFR;

Which generates assembly output similar to ...

           MVK     .S2     64,B4
           MVC     .S2     B4,ICR
           NOP             1
           MVC     .S2     IFR,B4
           NOP             1

This statement ...

   IFR;

... is unusual. The standard for C requires that when a volatile variable like IFR appears, then code must be generated to read it.

Thanks and regards,

-George

0 Koichiro Tashiro over 6 years ago in reply to George Mock

TI__Mastermind 22945 points

Hi George,

Thanks for your quick reply!
I close this item.

Thanks and regards,
Koichiro Tashiro

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Compiler/TMS320C6713B: Accessing to ICR, IFR by C code