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Tool/software: Code Composer Studio
Hello all,
I am using CCSv8 for CC3200 controller. In my firmware I am doing floating point calculations. I changed the floating point options from Vfplib to FPv4SPD16, after doing this my program is going into FAULT ISR routine where it stucks into while() loop. So, I tried to debug the issue whether there is something in my firmware, I found it is going into fault ISR while executing particular function call.
As VFPLIB is deprecated, so I changed it to supporting one. Here is my code snippet in which fault is generating,
int32_t phCoeffCalc(int32_t AEcnt, int32_t REcnt) { double w, frac_num, pherr, sinres, cosres, taninvres; int32_t res; w = (2.0 * 3.141592654 * FUND_FREQUENCY)/SAMP_FREQUENCY; sinres = sin((PH_CALIB_ANGLE * 3.141592654) / 180.00); cosres = cos((PH_CALIB_ANGLE * 3.141592654) / 180.00); taninvres = ((((double)AEcnt * sinres ) - ((double)REcnt * cosres))/(((double)REcnt * sinres) + ((double)AEcnt * cosres))); pherr = (atan(taninvres) * 180.0) / 3.141592654; frac_num = (sin(((pherr * 3.141592654)/180.00) + 3.00 * w) - sin(w))/(sin(((pherr * 3.141592654)/180.00)) + 4 * w); // UART_PRINT("W: %f B: %f PHErr: %f\r\n", w, frac_num, pherr); UART_PRINT("PHErr: %f\t", pherr); if(frac_num >= 0) { res = (int32_t) 8388608.00 * frac_num; } else { res = (int32_t) 8388608.00 + 268435456.00 * frac_num; } return res; }
So please suggest me where I have to look into to resolve that issue. Your early suggestions will be appreciated :)
Thank you & reagrds
Shubham
The CC3200 device has a Cortex-M4 core which doesn't support hardware floating point (whereas the Cortex-M4F core supports hardware floating point). Therefore, selecting FPv4SPD16 for the CC3200 will cause a hard fault at runtime when attempts to execute the unsupported hardware floating point instructions.Shubham Mittal said:I changed the floating point options from Vfplib to FPv4SPD16, after doing this my program is going into FAULT ISR routine where it stucks into while() loop.
The full text of the warning from CCS is:Shubham Mittal said:As VFPLIB is deprecated, so I changed it to supporting one.
Since for a CC3200 need to compile without hardware floating point support, change the --float_support option to be none.--float_support=vfplib is deprecated. To compile without hardware floating point support, use --float_support=none.
Hi chester,
Thanks for the suggestion, and it is working for me. I have one query, as you said
Chester Gillon said:The CC3200 device has a Cortex-M4 core which doesn't support hardware floating point (whereas the Cortex-M4F core supports hardware floating point). Therefore, selecting FPv4SPD16 for the CC3200will cause a hard fault at runtime when attempts to execute the unsupported hardware floating point instructions.
But in the compiler it says "FPv4SPD16 allows generation of floating point instructions for Cortex M4", as per my knowledge Cortex M4 has optional hardware floating point , that's why I selected it. But after reading the data sheet of CC3200, in its core hardware floating point is not included which you told.
Then how earlier VFPLIB was working with that?
vfplib was using software floating point, albeit the description of vfplib in the compiler documentation didn't make this clear. E.g. from ARM Optimizing C/C++ Compiler v17.6.0.STS User's Guide:Shubham Mittal said:Then how earlier VFPLIB was working with that?
With a test of the TI ARM v15.12.7.LTS compiler with the Target Process Version set to 7M4 (Cortex-M4) and the following program:
int main(void) { volatile float a = 1.2345f; volatile float b = 2.3456f; return a * b; }
With --float_support=vfplib then the generated code use software floating point, with the compiler calling the run-time library functions __aeabi_fmul and __aeabi_f2iz which perform software floating point:
int main(void) { 20004384: b50e push {r1, r2, r3, lr} volatile float a = 1.2345f; 20004386: 4805 ldr r0, [pc, #20] ; (2000439c <main+0x18>) 20004388: 9000 str r0, [sp, #0] volatile float b = 2.3456f; 2000438a: 4805 ldr r0, [pc, #20] ; (200043a0 <main+0x1c>) 2000438c: 9001 str r0, [sp, #4] return a * b; 2000438e: 9800 ldr r0, [sp, #0] 20004390: 9901 ldr r1, [sp, #4] 20004392: f7ff fe83 bl 2000409c <__aeabi_fmul> 20004396: f7ff ffd9 bl 2000434c <__aeabi_f2iz> } 2000439a: bd0e pop {r1, r2, r3, pc} 2000439c: 3f9e0419 .word 0x3f9e0419 200043a0: 40161e4f .word 0x40161e4f
And with --float_support=fpv4spd16 the hardware floating point instructions vmul.f32 and vcvt.s32.f32 are generated:
int main(void) { 200042e8: f1ad 0d08 sub.w sp, sp, #8 volatile float a = 1.2345f; 200042ec: 4807 ldr r0, [pc, #28] ; (2000430c <main+0x24>) 200042ee: 9000 str r0, [sp, #0] volatile float b = 2.3456f; 200042f0: 4807 ldr r0, [pc, #28] ; (20004310 <main+0x28>) 200042f2: 9001 str r0, [sp, #4] return a * b; 200042f4: ed9d 0a00 vldr s0, [sp] 200042f8: eddd 0a01 vldr s1, [sp, #4] 200042fc: ee20 0a80 vmul.f32 s0, s1, s0 20004300: eebd 0ac0 vcvt.s32.f32 s0, s0 20004304: ee10 0a10 vmov r0, s0 } 20004308: b002 add sp, #8 2000430a: 4770 bx lr 2000430c: 3f9e0419 .word 0x3f9e0419 20004310: 40161e4f .word 0x40161e4f