Tool/software: TI C/C++ Compiler
Hi guys,
I am using LAUNCHXL-F28027, which comes with the TMS320F28027PT controller and i am using generic type linker command file attached below :
/* //########################################################################### // // FILE: F2802x_generic_flash.cmd // // TITLE: Generic Linker Command File for f2802x devices // //########################################################################### // $TI Release: F2802x Support Library v3.02.00.00 $ // $Release Date: Thu Oct 18 15:45:37 CDT 2018 $ // $Copyright: // Copyright (C) 2009-2018 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. // $ //########################################################################### */ /* ====================================================== // For Code Composer Studio V2.2 and later // --------------------------------------- // In addition to this memory linker command file, // add the header linker command file directly to the project. // The header linker command file is required to link the // peripheral structures to the proper locations within // the memory map. // // The header linker files are found in <base>\headers\cmd // // For BIOS applications add: F2802x_Headers_BIOS.cmd // For nonBIOS applications add: F2802x_Headers_nonBIOS.cmd ========================================================= */ /* ====================================================== // For Code Composer Studio prior to V2.2 // -------------------------------------- // 1) Use one of the following -l statements to include the // header linker command file in the project. The header linker // file is required to link the peripheral structures to the proper // locations within the memory map */ /* Uncomment this line to include file only for non-BIOS applications */ /* -l F2802x_Headers_nonBIOS.cmd */ /* Uncomment this line to include file only for BIOS applications */ /* -l F2802x_Headers_BIOS.cmd */ /* 2) In your project add the path to <base>\headers\cmd to the library search path under project->build options, linker tab, library search path (-i). /*========================================================= */ /* Define the memory block start/length for the F2802x PAGE 0 will be used to organize program sections PAGE 1 will be used to organize data sections Notes: Memory blocks on F2802x are uniform (ie same physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be defined for both PAGE 0 and PAGE 1. Doing so will result in corruption of program and/or data. Contiguous SARAM memory blocks or flash sectors can be be combined if required to create a larger memory block. */ MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */ OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ FLASHA : origin = 0x3F7000, length = 0x000F80 /* on-chip FLASH */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ FLASHB : origin = 0x3F4000, length = 0x003000 /* on-chip FLASH */ // changed by hima FLASHC : origin = 0x3F2000, length = 0x002000 FLASHD : origin = 0x3F0000, length = 0x002000 IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */ ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ RAMM1 : origin = 0x000100, length = 0x000700 /* on-chip RAM block M1 */ RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0 *///changed line by hima //RAML1 : origin = 0x3F8000, length = 0x001000 // hima written } /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS { /* Allocate program areas: */ codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHA, RUN = RAMM0, LOAD_START(_RamfuncsLoadStart), LOAD_SIZE(_RamfuncsLoadSize), RUN_START(_RamfuncsRunStart), PAGE = 0 .cinit : > FLASHA | FLASHB, PAGE = 0 .pinit : > FLASHA | FLASHB, PAGE = 0 .text : >> FLASHA | FLASHB | FLASHC |FLASHD, PAGE = 0 csmpasswds : > CSM_PWL_P0, PAGE = 0 csm_rsvd : > CSM_RSVD, PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM1, PAGE = 1 .ebss : >> RAMM1 | RAML0, PAGE = 1 .esysmem : >> RAMM1 | RAML0, PAGE = 1 //.ebss : > RAMM0, /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : >> FLASHA | FLASHB, PAGE = 0 .switch : >> FLASHA | FLASHB, PAGE = 0 /* Allocate IQ math areas: */ IQmath : >> FLASHA | FLASHB, PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. /* /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT } /* //=========================================================================== // End of file. //=========================================================================== */
Here, i am using to RAM blocks i.e. RAMM1(origin = 0x000100, length = 0x000700) & RAML0 :(origin = 0x008000, length = 0x001000 ).
See the memory allocation details below:
I am getting this type of error :
"../F2802x_generic_flash.cmd", line 160: error #10099-D: program will not fit into available memory. run placement with alignment/blocking fails for section ".ebss" size 0x1c17 page 1. Available memory ranges:
RAMM1 size: 0x700 unused: 0x0 max hole: 0x0
RAML0 size: 0x1000 unused: 0x0 max hole: 0x0
error #10010: errors encountered during linking; "Power_Bank_Display.out" not built
I have one more RAM block left with which can found from the memory mapping of the F28027 controller, but when i try to access that particular block i am unable to get the expected results, with the fine code as well.
Can any one tell me the alternative?
Thanks & regards
Himavanth
