CCS/MSP430G2452: Catch-All ISR

Gennadiy Kiryukhin

Part Number: MSP430G2452
Other Parts Discussed in Thread: MSP430FR5994

Tool/software: Code Composer Studio

I need to add a catch-all isr where multiple unused interrupt vectors point to the same ISR. What is the correct way to do that in CCS?

over 6 years ago

0 Colin Adema1 over 6 years ago

TI__Prodigy 550 points

Hello Gennadiy,

Thank you for posting, we'll start to look into this.

All the best,

Colin Adema

0 Colin Adema1 over 6 years ago in reply to Colin Adema1

TI__Prodigy 550 points

Hello,

I believe this is what you were looking for. I've configured overflow interrupts for timers A and B on the MSP430FR5994, and had both of them service the same ISR by placing both vectors above it as you can see in the code below.

#pragma vector = TIMER0_A1_VECTOR
#pragma vector = TIMER0_B1_VECTOR
__interrupt void ISR(void){
    switch(__even_in_range(TA0IV, TAIV__TAIFG))
    {
        case TAIV__NONE:   break;           // No interrupt
        case TAIV__TACCR1: break;           // CCR1 not used
        case TAIV__TACCR2: break;           // CCR2 not used
        case TAIV__TACCR3: break;           // reserved
        case TAIV__TACCR4: break;           // reserved
        case TAIV__TACCR5: break;           // reserved
        case TAIV__TACCR6: break;           // reserved
        case TAIV__TAIFG:                   // overflow
            P1OUT ^= BIT0;
            break;
        default: break;
    }
    switch(__even_in_range(TB0IV, TBIV__TBIFG))
    {
        case TBIV__NONE:    break;          // No interrupt
        case TBIV__TBCCR1: break;           // TB0CCR1 interrupt
        case TBIV__TBCCR2: break;           // TB0CCR2 interrupt
        case TBIV__TBCCR3: break;           // TB0CCR3 interrupt
        case TBIV__TBCCR4: break;           // TB0CCR4 interrupt
        case TBIV__TBCCR5: break;           // TB0CCR5 interrupt
        case TBIV__TBCCR6: break;           // TB0CCR6 interrupt
        case TBIV__TBIFG:                   // overflow
            P1OUT ^= BIT1;
            break;
        default: break;
    }
}

Let me know if you have any more questions!

All the best,

Colin Adema

0 Gennadiy Kiryukhin over 6 years ago in reply to Colin Adema1

Expert 2800 points

After a bit more searching I've come across this documentation (http://www.ti.com/lit/ug/slau132u/slau132u.pdf) according to which I can list multiple vectors on one line:

#pragma vector = TIMER0_A1_VECTOR, TIMER0_B1_VECTOR

Also, taken from the document under the link:

#pragma vector=unused_interrupts
interrupt void user_trap_function(void)
{
}

"If you do not specify an ISR routine for some interrupt vectors, an ISR routine will be provided for those vectors..." which will do exactly what I need.

Thank you.

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CCS/MSP430G2452: Catch-All ISR