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CCS: TMS570LC4357 safety library - test fail

Other Parts Discussed in Thread: TMS570LC4357

Tool/software: Code Composer Studio

I use TMS570LC4357 chip. And I use Ti safety library.

I have some questions about using this library.

1. If the error is occur, all self test result is fail. -> It is the right action? Then, how i can find the problem?

2. When SCI communication, if the data is received by sci,  self-test is failed. -> I want to know the possiblity point which cause to make self-test fail.

  ( I use the self test as follows.

     - in boot state : Efuse, Pscon, MemInterconnect,  ADC, Vim, Can, FlashECC, SramECC, Pbist, CCMR

     - In runtime : Efuse, Pscon, MemInterconnect,  ADC, FlashECC, SramECC, CCMR)

Regards,

Minwoo

  • Tool/software: Code Composer Studio

    I use TMS570LC4357 with Ti safety library.

    I use SCI communication. Interrupt is used to receive data with IRQ. After interrupt is occurred, the safety test is all failed.

    But, if i use the interrupt as FIQ, safety test is passed. I want to know the reason.

    Regards,

    Minwoo

  • Tool/software: Code Composer Studio

    I use TMS570LC4357 with Ti safety library.

    I use SCI communication. Interrupt is used to receive data with IRQ. After interrupt is occurred, the safety test is all failed.

    But, if i use the interrupt as FIQ, safety test is passed. I want to know the reason.

    Regards,

    Minwoo

  • Tool/software: Code Composer Studio

    I used the Ti Safety Library as chip self diagnosis. I have a question about the relation of ESM and Self-test result.

    If ESM error is occured, ESM flag(bit) is checked. Then, Self-test result is all failed before only the software reset is done(If ESM flag is cleared by software, the test result is failed).

    I wondor this action is alright(If ESM error is occurred, All Self-test is failed) and why this chip is worked this way.

    Regards, Minwoo

  • Minwoo,

    Sorry for the delayed response on this thread. Based on the description of the systems between FIQ And IRQ, it appears that there may be different code path/privilege state under which the FIQ and IRQ code is executing. Can you please check to see if the code is in supervisor state or user state for both the use cases by reading the Core configuration registers

    The application note here explains interrupt and exception handling on Cortex R4/R5 Hercules Safety MCU platforms:

    http://www.ti.com/lit/an/spna218/spna218.pdf

    Regards,

    Rahul

  • Hello, Rahul

    I have some question about your answer.

    1. The code state is effect to IRQ or FIQ action?  I think the code act like follows.

      (1) Code is runned as Supervisor state or User state

      (2) Interrupt is occurred

      (3) Change the act state(IRQ or FIQ), and act request

      (4) Turn back the Supervisor state or User state 

      => It is wrong?. If it is right, it is mean that test state change action is different ? (Superviser -> IRQ / User -> IRQ). I think the matter is occurred the difference action between IRQ and FIQ.

    2. In the application note linked in your answer, I understand the difference IRQ and FIQ as FIQ code is runned in register and IRQ code is runned as jump to address. It cannot occur this problem?

    Regards,

    Minwoo