Part Number: TMS320C6713B
Tool/software: TI C/C++ Compiler
Hi!
We have a sw system for TMS320C6713 compiled from C/C++ source, and we are using optimization level 3. We have just put a lot of effort into searching for the cause of a rare event where the DSP enters an interrupt function and the B14 (assigned as Datapage Pointer DP) register no longer points to the start of static memory (in our case 0x2C1C0), causing sw hang or crash. Using CCS, the call stack pointed at a specific loop, and IRP (Interrupt Return Pointer) pointed at the blue line below (MV .L2X A4,B11). The (red) line above shows that the compiler has decided to run in parallel both IRQ disable and B14 (=DP) modification. In the interrupt function, both GIE and PGIE bits are zero. To our understanding, the parallel execution of IRQ disable and B14 modification makes it possible to enter the interrupt handler just before IRQ is disabled, but at the same time, B14 modification is executed, so that at the beginning of the interrupt function, the B14 content is "ruined" since it is no longer holding value 0x2c1C0. This is the only explanation that can explain our observations. We have observed this *.asm output both for version 7.4.13 and the latest 7.4.24 version of the TI C++ compiler. The v8.3.x compiler do not support C6713. Is this reported before? Our current fix is to apply option --interrupt_threshold=<some value> for the affected *.cpp files, so that this type of optimiztion do not take place.
Best regards
Arne Lie, SINTEF Digital
MVC .S2 CSR,B6
|| LDW .D1T1 *++A11(8),A3 ; |1112| (P) <0,0>
|| MV .L1X DP,A13 ; save dp
AND .L2 -2,B6,B4
MVC .S2 B4,CSR ; interrupts off
|| LDW .D1T2 *+A11(4),DP ; |1112| (P) <0,2>
MV .L2X A4,B11
MV .L2X A12,B12