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CCS/TMS570LS0432: Problems with enabling the Cache (in CCS and with DSS)

Part Number: TMS570LS0432

Tool/software: Code Composer Studio

Hello,

I have problems with enabling the cache of my evaluation board. As I am probably just doing something wrong, I was wondering how to do it properly.

What I do is: launching my debug configuration, connect to my device, load an externally compiled program on the LaunchPad and then try to click the box Data Cache Enabled or Instruction Cache Enabled in the ARM Advanced Features Overview. In both cases the checkmark appears for a brief moment and then vanishes again without anything changing.

If possible I would also like to find out a way on how to enable/disable the Cache with DSS. When I try manipulating the CP15_SYSTEM_CONTROL register it is also reset to the original value.

Tell me if there is any extra information you might need to help me.

Thank you and best regards

Hanno

  • Hanno,

    I will check how the CCS Debugger enables cache through the ARM Advanced Features options but, in my experience, it is rarely a simple on/off switch but instead it is more involving as external memory regions must be selected and configured into the cache registers.

    Actually, I just found the discussion below that shows the procedure and coding required to enable cache on this family of processors. Hopefully that helps you accomplish what you need at this time. 

    https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/485953  

    I will investigate the options and file a bug report in case they are improperly implemented. 

    Hope this helps,

    Rafael