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CCS/TMS320C6678: SRIO INTERRUPT generation from one DSP to another DSP

Part Number: TMS320C6678
Other Parts Discussed in Thread: SYSBIOS,

Tool/software: Code Composer Studio

Hi,

Is there any CCS project explaining interrupt generation from one Processor to another.

We have a custom built quad processor board and these processors are connected through SRIO switch on board. Through SRIO, we are trying to do data transfer between the processors. 

Modifying ccs example projects(SRIO_LoopbackDioIsrexampleproject), we are able to perform the data transfer from one DSP1 to another DSP2.

We tried to generate doorbell interrupt to DSP2 from DSP1 (by changing ftype and ttype) but no interrupt was generated on DSP2 (no ISR rx registered was called)

Gone through below link which is similar to the one we are facing, but could not get any solution to generate the interrupt on another DSP.

kindly guide to generate the doorbell interrupts.

  • Hi,

    We have such SRIO board to board example with doorbell interrupt in older MCSDK. The code was not carried forward into later Processor SDK RTOS for some reason. I can't find out the download link, so I attached part of the the package here, it is from pdk_C6678_1_1_2_6\packages\ti\transport.  

    ipc.zip

    Regards, Eric

  • Hi,

    Also found user guide here: http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide, look at the topic SRIO_IPC_Transport.

    Regards, Eric

  • This package doesnt have any doorbell interrupt configuration or ISR registered.

    Can you let me know the following function api's  defintion and how to use it,

    • CpIntc_dispatchPlug
    • CpIntc_enableHostInt
    • CpIntc_enableSysInt
    • EventCombiner_dispatchPlug
    • EventCombiner_enableEvent

    These api's were used in SRIO example projects for interrupt configuration, below is the code from SRIO_LoopbackDioIsrexampleproject.

    1. Host interrupt number defined is 8.I could not find any information about this in datasheet and what does this 8 refers to and why its mapped to INDST0

    2.I couldnot find any thing related to CpIntc_dispatch passed in  EventCombiner_dispatchPlug function. How the argument 8 passed is used in this function.Can i pass any arugment like '0' to this function.  Will it affect the functionality.

       CpIntc_dispatchPlug(CSL_INTC0_INTDST0, (CpIntc_FuncPtr)myDioTxCompletionIsr, (UArg)hSrioDrv, TRUE);
    
        /* The configuration is for CPINTC0. We map system interrupt 112 to Host Interrupt 8. */
        CpIntc_mapSysIntToHostInt(0, CSL_INTC0_INTDST0, 8);
    
        /* Enable the Host Interrupt. */
        CpIntc_enableHostInt(0, 8);
    
        /* Enable the System Interrupt */
        CpIntc_enableSysInt(0, CSL_INTC0_INTDST0);
    
        /* Get the event id associated with the host interrupt. */
        eventId = CpIntc_getEventId(8);
    
        /* Plug the CPINTC Dispatcher. */
        EventCombiner_dispatchPlug (eventId, CpIntc_dispatch, 8, TRUE);

    Kindly, help us to understand these interrupt configuration better to generate doorbell.

  • Hi,

    There is a good wiki explaining the C66x interrupt architecture: http://processors.wiki.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices. Those API are SYSBIOS APIs. You can search them under bios_6_xx_xx_xx\packages\ti\sysbios\family for C66x or C64p.

    "8" is the host interrupt, it is not an arbitrary number, it means CICx_OUT8. You can refer to C6679 data sheet, Figure 7-32 TMS320C6678 System Event Inputs — C66x CorePac Primary Interrupts (Sheet 1 of 4) for which is valid.

    Regards, Eric

  • I need some more information about doorbell interrupts to make sure our configurations are correct.

    In our code, we are passing

    CSL_SRIO_SetLSUReg5(handle,0,0,10,0,0x0001)

    In this, we are passing doorbell info as 0001. 

    • Can we pass any pattern message like 0xaaaa,0xbbbb as doorbell info in LSU5 register?
    • If no, then What doorbell info (Drbll Info)  value we need to pass in LSU5 register?
    •  How to decode that Drbll info at the reception end?

  • Hi,

    We have limited expertise left on SRIO. I saw the driver used code: 

    CSL_SRIO_SetLSUReg5 (gSRIODriverMCB.SRIO_GLOBAL_HANDLE, ptr_srioSocket->mapIndex,
    ptr_DioAddrInfo->ttype,
    ptr_DioAddrInfo->ftype,
    ptr_srioSocket->doorbellTransfer.hopCount,
    doorbellInfo);

    where         doorbellInfo = CSL_FMKR(3, 0, doorbellBit) | CSL_FMKR(6, 5, doorbellReg);

    Regards, Eric 

  • Hi,

    In our development, DSP's will be receiving multi interrupt from other DSP'S. We need to decode the interrupt (like who has generated the interrupt either DSP1 or 3 )and  perform the task accordingly,

    But from the code snippet, it shows doorbell information is  framed by doorbellBit (0-15) and doorbellReg (0-3).

    So, I generated door bell interrupt with doorbell info as 0001 from DSP1 to DSP2  i.e., DOORBELL REG 0 and DOORBELL bit 1.

    How to decode this interrupt doorbell info in other DSP.  Does it reflect in any status registers.  ?

  • Hi,

    Please read SRIO user guide  2.3.5 Doorbell Operation if helps. Also, Although the outbound can send any value on the Doorbell Info field, the incoming Doorbell has some reserved bits for the TI IP. 

    Doorbell_Info [3:0] bits are used to determine which doorbell bit will be set in the Doorbell Register
    Doorbell Info [4] is reserved
    Doorbell Info [6:5] determines which doorbell register will be used
    Doorbell Info [15:7] is reserved bits as well.

    That is how our code setup LSUReg5 doorbellinfo field and how to decode it.

    Regards, Eric

  • Hi Eric,

    I understand about this doorbell configuration in LSUReg5.

    As i post earlier, doorbell is generated when i set doorbell info value to 0001. I am able to see ISR invoked in other DSP.

    My question is how the DSP will know the source of interrupt (who generated the interrupt.) from the doorbell. When i read the interrupt status register, its Zero.

    In our design we have 4 dsp's. One DSP can get doorbell interrupt from other DSP's how to differentiate the interrupt received from one dsp and other.