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CCS: CCS can no connect C66 core

Tool/software: Code Composer Studio

Hi TI,

I am now trying debuging in C66 core ON tda4, but i always can not connect to it, only connect successfully occasionally, most time, it will fail

i did the step below:

1,TDA4 power on, and open ccs

2,loadJSFile "psdk_rtos_auto_j7_06_01_00_15/pdk/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/launch.js", do hardware initialization in ccs

3, connect to C66 ,fail, can not connet successfully, (but , very occasionally, can connect successfully, and load programme ok, debug programme ok)

ps:

1,in this way, connect to C7X by hand , also failed . but if i connect to C7X with script, it will successful

    i use this script "psdk_rtos_auto_j7_06_01_00_15/tidl_j7_01_00_00_00/ti_dl/utils/targetTest/launch_tidl.js"

  so, what is the difference between by hand  and the script, and can i make a script for C66 ,should i write a script for C66?

2, in C66 fail case, if i connected failed , i tried another way

    i re-connect  DMSC_Cortex_M3_0, then i can connect to C66 successfully by hand this time

   but , at this time , the C66 programme MUST be run in L2SRAM( base addr: 0x00800000, len 288k), DDR0(base:0x80000000) and all other memory can not be used

   if the programme is small , i can debug it very happy in this way

   but ,if the programme is bigger than 288k, it always report error like this "C66xx_0: File Loader: Verification failed: Values at address 0x80000000 do not match Please verify target memory and memory map."

thanks very much for your help

  • Hi Haibo,

    Are you trying to debug RTOS applications? If yes, the procedure you have followed in (1) is correct. You have to run the launch.js after lauching the target configuration file (ccxml). The script does a bunch of things, like loading the Cortex M3 with DMSC FW, initialising the DDR correctly, running the board configuration and so on. Reconnecting the Cortex M3 manually, like you have done in (2) is not a good idea. You might not be loading the M3 FW, or initialising DDR. This is why you are not able to use DDR memory to load your application. 

    Ideally you should be doing this :

    1. Power on TDA4
    2. Open CCS and launch the target configuration. (Make sure that you created the target configuration file correctly, with the correct path to GELs)
    3. Run launch.js and wait for it complete successfully.
    4. If the script finished successfully, you should not have trouble connecting to any of the cores (C66, C71, R5F). If the script failed, please share the logs.

    Try this steps fresh, and if you're not able to connect to C66/C71, please share logs from all the CCS consoles (scripting console and CIO) and a screenshot of your CCS window which shows the debug pane.

  • Haibo,

    Also let me know which version of CCS are you using. The recommended version is 9.3.

    Regards,
    Anand