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CCSv4 assembler -- literal pool?

MATT GESSNER
Expert 1435 points

Other Parts Discussed in Thread: AM3505

I'm working with a AM3505, a Cortex A8, using CCSv4, translating some other code.

The code uses the gas .ltorg mnemonic to tell the assembler where to locate the literal pool.

The LTORG statement is also in a lot of ARM's documentation, yet for some reason, TI doesn't seem to implement it.

What's the reason for this?  It appears that TI has gone its own way in the decision not to support standard behavior that ARM puts in their documentation.

How do I mimic the same functionality?  Do I have to do all the math by hand?  Do I have to create my own literal pool, and maintain a base register to it?

Thanks,

Matt Gessner

 

 

  • 0
    TI__Intellectual 2630 points
    1. ARM RVCT tools and TI's ARM compiler are two different products. There are features that one product has while the other one does not.
    2. TI compiler does not support  LTORG directive
    3. Here is a work around if you want to use literal that could not fit into the immediate field of the LDR instruction

    LDR R0, const1

    .align 4

    const1:.word 0xAABBCCDD

    OR you can do this:

    MOVT R0, 0XAABB

    MOVW R0, 0xCCDD

    Sure, this is not as convenient as the directive. If you feel strongly that TI's tool should support this directive, you can go ahead to file an enhancement request.