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CCS/AM5718: unavailability of register details for registering interrupts

Part Number: AM5718

Tool/software: Code Composer Studio

Hi,

I am using AM5718,I rebuilt a bare metal project for McSPI using your APIs and i registered interrupts using your default APIs from file interrupt.c.But interrupt's  register details are not available in your TRM. From where we get those details??.Please share documents regarding this..

Regards,

Shan Muhammad

  • Are you looking for McSPI IRQ status registers? If so, they are explained in section "24.4.4.7 Interrupts" of the device TRM (chapter "24.4 Multichannel Serial Peripheral Interface")

    Let us know if this helps,

    thanks,

    Alex

  • Hi,

    Alex Bashkov said:
    Are you looking for McSPI IRQ status registers? If so, they are explained in section "24.4.4.7 Interrupts" of the device TRM (chapter "24.4 Multichannel Serial Peripheral Interface")

    not that, some  register details in your APIs (Intc_IntPrioritySet)are not available in your TRM. 

    eg:=

    void Intc_IntPrioritySet(uint16_t intrNum, uint16_t priority,uint8_t hostIntRoute)
    {
    uint32_t index, mask;
    uint32_t gicIntrId = (uint32_t)intrNum + (uint32_t)32U;

    if (intrNum < NUM_INTERRUPTS_EXTERNAL)
    {
    index = ((uint32_t) gicIntrId >> 2) + 1U;
    mask = (uint32_t) gicIntrId % 4U;

    /*Sets the priority of shared peripheral interrupt*/
    HW_WR_REG32(SOC_INTC_MPU_DISTRIBUTOR_BASE +(MPU_GICD_IPR0 + (NUM_BYTES_REG * index)),
    ((priority & (uint32_t) 0xFF) << (mask * 8U)));
    }
    }

    here SOC_INTC_MPU_DISTRIBUTOR_BASE +MPU_GICD_IPR0 is not available in your TRM.

    Regards

    Shan Muhammad

  • That's not a real interrupt name, right? Here software just calculates the physical address (base + offset) of the IRQ register to write into. If you print the address you should find the said printed address in the TRM. 

  • Hi ,

    Alex Bashkov said:
    That's not a real interrupt name, right?

    Yes that's not a real interrupt name.

    I just calculated the physical address by printing and that was 0x48211464(intrNum=65(McSPI1_CH0)). But i couldn't able to locate that address  in your  TRM.

    Regards

    Shan Muhammad

  • Hello,

    OK thanks for providing the address. This is the MPU_INTC address space.

    TRM said:

    Then, the TRM doesn't list all ARM specific registers, instead, you should refer to Arm documentation. 

    TRM said:

    4.4.3 MPU_INTC Registers
    For information about the MPU_INTC registers and their description, see the Arm Cortex-A15 MPCore
    Technical Reference Manual (available at infocenter.arm.com/help/index.jsp).

    Then I went and looked in the Arm doc, at offset 0x1000 is the Generic Interrupt Controller (GIC) Distributer 

    Arm doc said:

    Then in the Distributor registers @ offset 0x464, looks like you've hit this register.

    Arm doc said:

    I tried to walk you through and show how I investigated this address, but I'm not too familiar with Arm docs myself, so hopefully, you will make sense out of it.

    I still don't understand why you have to go dig into the processor's registers. The processor is just a handler. You can check what's wrong in the McSPI interrupt status registers directly, for example by polling MCSPI_IRQSTATUS register.

    Anyway, I hope it helps, and please let us know your finds and if we can close this thread.

    Thanks,
    Alex