CCS/TM4C129ENCPDT: SPI Transfer issue

Hi,

Are you using a LaunchPad or your custom hardware? Can you attach the SPI configuration from the "Board.c" file?

Todd

I am using custom board.  I am using SPI3

/*
* =============================== SPI ===============================
*/
/* Place into subsections to allow the TI linker to remove items properly */
#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_SECTION(SPI_config, ".const:SPI_config")
#pragma DATA_SECTION(spiTivaDMAHWAttrs, ".const:spiTivaDMAHWAttrs")
#endif

#include <ti/drivers/SPI.h>
#include <ti/drivers/spi/SPITivaDMA.h>

SPITivaDMA_Object spiTivaDMAObjects[EK_TM4C129EXL_SPICOUNT];

#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_ALIGN(spiTivaDMAscratchBuf, 32)
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma data_alignment=32
#elif defined(__GNUC__)
__attribute__ ((aligned (32)))
#endif
uint32_t spiTivaDMAscratchBuf[EK_TM4C129EXL_SPICOUNT];

const SPITivaDMA_HWAttrs spiTivaDMAHWAttrs[EK_TM4C129EXL_SPICOUNT] = {
{
.baseAddr = SSI2_BASE,
.intNum = INT_SSI2,
.intPriority = (~0),
.scratchBufPtr = &spiTivaDMAscratchBuf[0],
.defaultTxBufValue = 0,
.rxChannelIndex = UDMA_SEC_CHANNEL_UART2RX_12,
.txChannelIndex = UDMA_SEC_CHANNEL_UART2TX_13,
.channelMappingFxn = uDMAChannelAssign,
.rxChannelMappingFxnArg = UDMA_CH12_SSI2RX,
.txChannelMappingFxnArg = UDMA_CH13_SSI2TX
},
{
.baseAddr = SSI3_BASE,
.intNum = INT_SSI3,
.intPriority = (~0),
.scratchBufPtr = &spiTivaDMAscratchBuf[1],
.defaultTxBufValue = 0,
.rxChannelIndex = UDMA_SEC_CHANNEL_TMR2A_14,
.txChannelIndex = UDMA_SEC_CHANNEL_TMR2B_15,
.channelMappingFxn = uDMAChannelAssign,
.rxChannelMappingFxnArg = UDMA_CH14_SSI3RX,
.txChannelMappingFxnArg = UDMA_CH15_SSI3TX
}
};

const SPI_Config SPI_config[] = {
{
.fxnTablePtr = &SPITivaDMA_fxnTable,
.object = &spiTivaDMAObjects[0],
.hwAttrs = &spiTivaDMAHWAttrs[0]
},
{
.fxnTablePtr = &SPITivaDMA_fxnTable,
.object = &spiTivaDMAObjects[1],
.hwAttrs = &spiTivaDMAHWAttrs[1]
},
{NULL, NULL, NULL}
};

/*
* ======== EK_TM4C129EXL_initSPI ========
*/
void EK_TM4C129EXL_initSPI(void)
{
/* SSI2 */
/*
* NOTE: TI-RTOS examples configure pins PD0 & PD1 for SSI2 or I2C7. Thus,
* a conflict occurs when the I2C & SPI drivers are used simultaneously in
* an application. Modify the pin mux settings in this file and resolve the
* conflict before running your the application.
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);

GPIOPinConfigure(GPIO_PD3_SSI2CLK);
GPIOPinConfigure(GPIO_PD2_SSI2FSS);
GPIOPinConfigure(GPIO_PD1_SSI2XDAT0);
GPIOPinConfigure(GPIO_PD0_SSI2XDAT1);

GPIOPinTypeSSI(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);

/* SSI3 *///CHANGED WITH NEW SCHEME
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI3);

GPIOPinConfigure(GPIO_PF3_SSI3CLK);
//GPIOPinConfigure(GPIO_PF2_SSI3FSS);
GPIOPinConfigure(GPIO_PQ2_SSI3XDAT0);
GPIOPinConfigure(GPIO_PQ3_SSI3XDAT1);

GPIOPinTypeSSI(GPIO_PORTQ_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_3 );
//GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_3 | GPIO_PIN_2);
#if 0
GPIOPinConfigure(GPIO_PQ0_SSI3CLK);
GPIOPinConfigure(GPIO_PQ1_SSI3FSS);
GPIOPinConfigure(GPIO_PQ2_SSI3XDAT0);
GPIOPinConfigure(GPIO_PQ3_SSI3XDAT1);

GPIOPinTypeSSI(GPIO_PORTQ_BASE, GPIO_PIN_0 | GPIO_PIN_1 |
GPIO_PIN_2 | GPIO_PIN_3);
#endif
EK_TM4C129EXL_initDMA();
SPI_init();
}

Thanks. Can you confirm that Board_SPI3 is defined as 1.

What do you see on the actual wire? Is anything being sent out?

Todd

Hi Todd,

BOARD_SPI3 is 1. SPI transfer is taking place but in unusual way. I used default data size as 8. for transferring 16 bit data, I split it into 2. But msb of second byte is not getting write into register.That is, I write second byte as 0xBB, when I read back it is read as 0x3B.

au8_buf[0] = REGISTER_WRITE | ((u8_regAddress & 0x3F) << LOGICAL_SHIFT_ONE) | ((u16_regData & MASK_0x100) >> LOGICAL_SHIFT_EIGHT);
au8_buf[1] = (u16_regData & MASK_0xFF);

/* Initialize SPI transaction structure */
masterTransaction.count = 2;
masterTransaction.txBuf = (Ptr)au8_buf;

masterTransaction.rxBuf = (Ptr)NULL;

/*Chip select low to enable SPI transfer*/
GPIO_write(u8_adcCs, Board_GPIO_OFF);
/* Initiate SPI transfer */
u8_ret = SPI_transfer(masterSpi, &masterTransaction);
/*Chip select high to disable SPI transfer*/
GPIO_write(u8_adcCs, Board_GPIO_ON);

Sorry for the delay.

What do you see on the wires (e.g. logic analyzer)?

Todd

Hi,

Spi device connected gives output data at rising edge of the clock. It is evident by probing the pin to oscilloscope and Controller has to read the data on falling edge .But it is seen that controller reads data on falling edge of previous clock. So a shift in value occur.

Regards

Jamshi

Jamshi,

It is okay to use your own GPIO chip select and not use Fss. Have you tried adding a delay between asserting the chip select and the SPI_transfer() call to make sure the slave is ready for the transaction?

Jas

jamshi pj said:

Spi device connected gives output data at rising edge of the clock. It is evident by probing the pin to oscilloscope and Controller has to read the data on falling edge .But it is seen that controller reads data on falling edge of previous clock. So a shift in value occur.

Which means the TM4C SPI configuration to use is:

To set the TM4C mode the required SPI parameters need to be set and passed as the 2nd argument to the the SPI_open function. I.e. try:

SPI_Params slaveSpiParams;
en_transferStat_t en_transferOk;
SPI_Params_init(&slaveSpiParams);
slaveSpiParams.mode = SPI_MASTER;
slaveSpiParams.frameFormat = SPI_POL1_PHA1; /* SPI mode Polarity 1 Phase 1 */

/* Initialize SPI handle as default master for ADC*/
masterAdc1 = SPI_open(Board_SPI3, &slaveSpiParams);

Your original code was passing NULL as the 2nd argument to SPI_open(), meaning default SPI parameters were used for which the default frameFormat is SPI_POL0_PHA0 /* SPI mode Polarity 0 Phase 0 */

You might also need to set the slaveSpiParams.bitRate to the required BIT rate in Hz. The default is 1 MHz.

Hi,

I changed to

masterAdc1 = SPI_open(Board_SPI3, &slaveSpiParams);

and with SPI mode Polarity 0 Phase 0,I write register and with SPI mode Polarity 0 Phase 1 Read the converted result. I am not able to perform all with same polarity.

Jamshi,

I'm not sure what you mean by writing and reading the register with different polarities here, but you can't change the polarity once you open a SPI instance. I believe the polarity and phase settings you are looking for are SPO=1 and SPH=0.

Jas