Tool/software: Code Composer Studio
Hello,
Below is the description of the issue - its regarding usage of loadprogram() with arguments and the configuration around it.
CCS: version 10.0.0.00010
Platform: TDA2Px - Vision SDK3.0 (RTOS)
DSS scripting(js)
Using javascript with debugsession.memory.loadProgram() with arguments to call main() in a QSPI Flasher(exe)
1. Modifications
Modifications on the Javascript :
- Change the call from loadporgram(exe) to loadprogram(exe, arguments)
" As per DSS scripting documentation, to use loadprogram(exe, arguments) --args needs to be used during linking "
Modifications on the C program :
- Added "LNKFLAGS_LOCAL_COMMON = --args=100 " to Makefile
- Added .args section to lnk.cmd
Attached the two files(Makefile & Lnk.cmd)
ERROR: SEVERE: Cortex_M4_IPU1_C0: File Loader: Verification failed: Values at address 0x83512060 do not match Please verify target memory and memory map.
We understand there could be a problem with how the args section is being allocated.
Below are the possible solutions. Please do clarify which case applies to our situation -
1. Two ways to achieve this one is to build your application with '--args' (non-BIOS apps) or set the '.args' section via BIOS config tool (BIOS apps). Then you can use GEL to write values to the section in target memory that has been allocated for argc, argv values.
<Source: TI forums>
The presentation link to use BIOS Config tool in the forum not longer works. Would this solution be applicable to us ?
2. The other approach is that since the DSS loadProgram API has a limitation where it only supports passing arguments to main for non-BIOS based applications. For BIOS based application, the manual approach described in the link above will need to be used (you can use DSS memory write APIs to manually do this).
(1) Open the BIOS configuration file (.cfg) with XGCONF editor (right click on the config file in CCS and choose "Open With->XGCONF").
(2) In the XGCONF editor, Click "System Overview" at the top of the BIOS config file
(3) In system overview, click "Memory" under memory management
(4) In memory-module settings, click program module link
(5) In runtime sizes, set a value for Argument size
<Source: TI forums>
If this applies...Are there eamples on how to manually use DSS memory APIs such as writeword(), writedata() or how to use XGCONF?
I'm trying out these options. Highly appreciate any inputs.
Thanks,
Pramod
Directory : \processorsdk\ti_components\drivers\pdk_01_09_00_17\packages\ti\boot\sbl_auto\qspiflash\examples\qspi_flash_writer
______________
Make file:
_____________
#
# This file is the makefile for building QSPI FLash Writer.
#
include $(PDK_INSTALL_PATH)/ti/build/Rules.make
APP_NAME = qspi_flash_writer
SRCDIR = .
INCDIR = .
#Create the executable under SBL as this is used for flashing the SBL image, so
#logical to put this together with sbl image
$(APP_NAME)_BINPATH = $(DEST_ROOT)/sbl/$(APP_NAME)
export $(APP_NAME)_BINPATH
# List all the external components/interfaces, whose interface header files
# need to be included for this component
INCLUDE_EXTERNAL_INTERFACES = pdk
# List all the components required by the application
COMP_LIST_COMMON = csl stw_platform qspiflash_lib pm_hal
# Common source files and CFLAGS across all platforms and cores
SRCS_COMMON = main.c
PACKAGE_SRCS_COMMON = .
CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS)
LNKFLAGS_LOCAL_COMMON = --args=100
ifeq ($(CORE),ipu1_0)
LNKCMD_FILE = lnk.cmd
endif
# Core/SoC/platform specific source files and CFLAGS
# Example:
# SRCS_<core/SoC/platform-name> =
# CFLAGS_LOCAL_<core/SoC/platform-name> =
# Include common make files
ifeq ($(MAKERULEDIR), )
#Makerule path not defined, define this and assume relative path from ROOTDIR
MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
export MAKERULEDIR
endif
include $(MAKERULEDIR)/common.mk
# OBJs and libraries are built by using rule defined in rules_<target>.mk
# and need not be explicitly specified here
# Nothing beyond this point
______________
Lnk.cmd :
_____________
-stack 0x4000 /* SOFTWARE STACK SIZE */
-heap 0x4000 /* HEAP AREA SIZE */
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
IRAM_MEM: org = 0x40300000 len = 0x1C000 /* RAM 0x1FBFF*/
MMU_TLB: ORIGIN = 0x4031C000 LENGTH = 0x000004000
DDR3_A8: org = 0x80500000 len = 0xA000000 /* 176 MB */
DDR3_DSP: org = 0x8B000000 len = 0x02000000 /* 32 MB */
DDR3_M3VPSS: org = 0x8D000000 len = 0x01000000 /* 16 MB */
DDR3_M3VIDEO: org = 0x8E000000 len = 0x01000000 /* 16 MB */
DDR3_SR0: org = 0x8F000000 len = 0x01000000 /* 16 MB */
GPMC_NOR: org = 0x08000000 len = 0x1000 /* 4 MB */
}
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
SECTIONS
{
.init : load > DDR3_A8
.text : load > DDR3_A8 /* CODE */
.data : load > DDR3_A8 /* INITIALIZED GLOBAL AND STATIC VARIABLES. */
.bss : load > DDR3_A8 /* UNINITIALIZED OR ZERO INITIALIZED */
/* GLOBAL & STATIC VARIABLES. */
RUN_START(bss_start)
RUN_END(bss_end)
.const : load > DDR3_A8 /* GLOBAL CONSTANTS */
.cinit : load > DDR3_A8
.stack : load > DDR3_A8 /* SOFTWARE SYSTEM STACK */
.gpmc_mem : load > GPMC_NOR
.sysmem : load > DDR3_A8
.plt : load > DDR3_A8
.args : load > DDR3_A8
}