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CCS/TMS320F28377D: CCS/TMS320F28377D When Power Off-On micro is not wakening up

user6344827
Prodigy 80 points
Part Number: TMS320F28377D

Tool/software: Code Composer Studio

Once I flash the micro using "flash" tool from CCS, if I remove power (power off) and power it again (power on), the microcontroller does not wake-up and I have to re-flash it again to make it work... I'm pretty sure is a configuration problem from CCS flash options, but... I don't know which one.

Can anyone help me?

Thank you!

  • 0
    TI__Guru* 87145 points

    Hi,

    It may have to do with boot mode GPIO pins and not CCS.  Please make sure the boot mode pins are configured for flash boot.

    Take a look at this FAQ and see if it helps:  https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/878674

    Let me know if you need further help.

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Thank you Vamsi,

    Not exactly resolved my issue, but the explanation is usefull.

  • 0 in reply to user6344827
    TI__Guru* 87145 points

    Hi,

    Glad it is useful.

    You mentioned your issue is not resolved - Please let me know the current situation (after you went through the FAQ and corresponding fixes) so that we can help to resolve this.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Hi Vamsi,

    I reconfigured the project following the instructions, re-compiled for "Flash-Standalone" mode and now power issue is gone, but now I'm trying to flash both CPU's but when I flash one CPU through "Flash" button the other CPU is not flashed, and viceversa... How do I have to configure CCS to make it ready to flash both CPU's at same time? Is it possible?

    Thank you very much!

  • 0 in reply to user6344827
    TI__Guru* 87145 points

    Hi,

    Only one core's flash bank can be programmed at a time since there is only one charge pump (pump is shared between the two core's flash wrappers).  Hence, you need to program each core separately.  

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Hi again Vamsi,

    The problem seems to be located on how the CPUs are flashed, because I'm not doing it well... My steps are:

    1 - Compile CPU2 in "Flash debug" mode

    2 - Flash CPU2

    3 - Compile CPU1 in "Flash debug" mode

    4 - Flash CPU1

    5 - Reset power to restart (CPU1 as a master and CPU2 as slave)

    Are these steps ok? If I change the order (first CPU1 and after CPU2) the system is blocked and CPU1 is not working and not responding.

    Thank you

  • 0 in reply to user6344827
    TI__Guru* 87145 points

    Hi,

    You can try this: After you load to CPU1 or CPU2, make sure you don't run the code (remove run to main upon load in CCS debugger options) until both cores' banks are loaded.  Once both of them are loaded, run CPU1 and then CPU2.  Let me know if this helps to fix the issue.

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Hi Vamsi,

    I removed main from Run to symbol, flashed both (CPU1 & CPU2) then perform power off-on and nothing works.

    I'm seeing when one CPU is flashed, the other one is erased or something similar, because when I can make CPU1 work CPU2 is not responding.

    I don't understand the exact procedure to flash both CPUs with CCS, could you explain the exact procedure to perform this, please?

    thanks,

  • 0 in reply to user6344827
    TI__Guru* 87145 points

    Hi,

    Thank you for the update.

    Application not working when both cores are executed - is a different problem than programming the both banks.  Before we enter in to that, let us first close the flash programming issue.

    Loading code to one core's flash bank should not disturb other core's flash code.  Did you check the memory contents in the watch window to confirm whether it is really erased or not?  If not, please check and confirm.  You can also use the checksum feature available in the flash plugin GUI to confirm that.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Hi Vamsi,

    Thanks for the reply.

    The memory content of the chip can be checked on the watch window but it can be only checked the content memory of the actual flashed CPU, I mean, if I flash CPU1, I can only check memory content of CPU1 (and confirm it is actually flashed)  but I cannot check at the same time the memory content of CPU2, at least I don't know how to do it with CCS. So if both memories cannot be checked at the same time, it cannot be confirmed the other CPU is or is not erased. What am I missing?

    Thank you very much and regards,

    Sergi

  • 0 in reply to user6344827
    TI__Guru* 87145 points

    Sergi,

    Thank you for the update.

    Once you launch the target configuration and connect to the target CPUs, you can check memory of both CPUs at any time in the memory window.

    Could you confirm whether you are able to connect to both cores in CCS or not?

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Hi Vamsi,

    For now what I realized is my CCS debug configuration was wrong that's why I couldn't do anything with dual core approaches (check memory of both CPUs, reset manually each CPU from CCS, etc.)

    This guide helped me as well, if it is useful for someone:

    Thank you and regards,

    S

  • 0 in reply to user6344827
    TI__Guru* 87145 points

    Sergi,

    Glad you are able to now check the flash contents.  Do you have further questions on the flash content being erased? 

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Prodigy 80 points

    Hi Vamsi,

    Not for now. Thank you very much!

    S