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CCS/TM4C1294NCPDT: chip id read from ft812 display driver board

GOVIND PADHIYAR
Intellectual 490 points

Part Number: TM4C1294NCPDT

Tool/software: Code Composer Studio

i am try to chip id read but unable to read chip id using spi so i needed solution in that how can read id i am mention my code


int main(void)
{
// uint32_t pui32DataRx[3];
ui32SysClkFreq = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480), 120000000);

ConfigureUART();

SSI0_int();

while(1)
{
 PD_Reset();

Host_Command(HCMD_CLKEXT);

Host_Command(HCMD_ACTIVE);
SysCtlDelay(100);


// turn off screen output during startup
 wr8(REG_GPIOX + RAM_REG, 0); // Set REG_GPIOX to 0 to turn off the LCD DISP signal
wr8(REG_PCLK + RAM_REG, 0); // Pixel Clock Output disable // load parameters of the physical screen to the Eve

// All of these registers are 32 bits, but most bits are reserved, so only write what is actually used
wr16(REG_HCYCLE + RAM_REG, HCYCLE); // Set H_Cycle to 548
wr16(REG_HOFFSET + RAM_REG, HOFFSET); // Set H_Offset to 43
wr16(REG_HSYNC0 + RAM_REG, HSYNC0); // Set H_SYNC_0 to 0
wr16(REG_HSYNC1 + RAM_REG, HSYNC1); // Set H_SYNC_1 to 41
wr16(REG_VCYCLE + RAM_REG, VCYCLE); // Set V_Cycle to 292
wr16(REG_VOFFSET + RAM_REG, VOFFSET); // Set V_OFFSET to 12
wr16(REG_VSYNC0 + RAM_REG, VSYNC0); // Set V_SYNC_0 to 0
wr16(REG_VSYNC1 + RAM_REG, VSYNC1); // Set V_SYNC_1 to 10
wr8(REG_SWIZZLE + RAM_REG, SWIZZLE); // Set SWIZZLE to 0
wr8(REG_PCLK_POL + RAM_REG, PCLK_POL); // Set PCLK_POL to 1
wr16(REG_HSIZE + RAM_REG, HSIZE); // Set H_SIZE to 480
wr16(REG_VSIZE + RAM_REG, VSIZE); // Set V_SIZE to 272
wr8(REG_CSPREAD + RAM_REG, CSPREAD); // Set CSPREAD to 1 (32 bit register - write only 8 bits)
wr8(REG_DITHER + RAM_REG, DITHER); // Set DITHER to 1 (32 bit register - write only 8 bits)

}


}

void SSI0_int(void)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);

GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_2MA,GPIO_PIN_TYPE_STD); // Make default state as Pull- up.

GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);
GPIOPinTypeSSI(GPIO_PORTA_BASE,GPIO_PIN_4|GPIO_PIN_2);

SSIConfigSetExpClk(SSI0_BASE, ui32SysClkFreq, SSI_FRF_MOTO_MODE_1, SSI_MODE_MASTER, 1000000, 8);
SSIEnable(SSI0_BASE);

}


void Host_Command(uint8_t HCMD)
{

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3,0x00);
SSIDataPut(SSI0_BASE, HCMD);
SSIDataPut(SSI0_BASE, 0X00);// This second byte is set to 0 but if there is need for fancy, never used setups, then rewrite.
SSIDataPut(SSI0_BASE, 0X00);
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3,GPIO_PIN_3);

}
void PD_Reset(void)
{

GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0,0x00);
SysCtlDelay(ui32SysClkFreq/300);
GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0,GPIO_PIN_0);
SysCtlDelay(ui32SysClkFreq/500);

}
void wr32(uint32_t address, uint32_t parameter)
{
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);

SSIDataPut(SSI0_BASE,(uint8_t)((address >> 16) | 0x80)); // RAM_REG = 0x302000 and high bit is set - result always 0xB0
SSIDataPut(SSI0_BASE,(uint8_t)(address >> 8)); // Next byte of the register address
SSIDataPut(SSI0_BASE,(uint8_t)address); // Low byte of register address - usually just the 1 byte offset
while(SSIBusy(SSI0_BASE)){}
SSIDataPut(SSI0_BASE,(uint8_t)(parameter & 0xff)); // Little endian (yes, it is most significant bit first and least significant byte first)
SSIDataPut(SSI0_BASE,(uint8_t)((parameter >> 8) & 0xff));
SSIDataPut(SSI0_BASE,(uint8_t)((parameter >> 16) & 0xff));
SSIDataPut(SSI0_BASE,(uint8_t)((parameter >> 24) & 0xff));
while(SSIBusy(SSI0_BASE)){}
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);
}

void wr16(uint32_t address, uint16_t parameter)
{
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);

SSIDataPut(SSI0_BASE,(uint8_t)((address >> 16) | 0x80)); // RAM_REG = 0x302000 and high bit is set - result always 0xB0
SSIDataPut(SSI0_BASE,(uint8_t)(address >> 8)); // Next byte of the register address
SSIDataPut(SSI0_BASE,(uint8_t)address); // Low byte of register address - usually just the 1 byte offset
while(SSIBusy(SSI0_BASE)){}
SSIDataPut(SSI0_BASE,(uint8_t)(parameter & 0xff)); // Little endian (yes, it is most significant bit first and least significant byte first)
SSIDataPut(SSI0_BASE,(uint8_t)(parameter >> 8));
while(SSIBusy(SSI0_BASE)){}
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);
}

void wr8(uint32_t address, uint8_t parameter)
{
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);

SSIDataPut(SSI0_BASE,(uint8_t)((address >> 16) | 0x80)); // RAM_REG = 0x302000 and high bit is set - result always 0xB0
SSIDataPut(SSI0_BASE,(uint8_t)(address >> 8)); // Next byte of the register address
SSIDataPut(SSI0_BASE,(uint8_t)(address)); // Low byte of register address - usually just the 1 byte offset
while(SSIBusy(SSI0_BASE)){}
SSIDataPut(SSI0_BASE,parameter);
while(SSIBusy(SSI0_BASE)){}
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);
}

uint32_t rd32(uint32_t address)
{

uint32_t Data32;

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);


SSIDataPut(SSI0_BASE,(address >> 16) & 0x3F);
SSIDataPut(SSI0_BASE,(address >> 8) & 0xff);
SSIDataPut(SSI0_BASE,address & 0xff);

 SSIDataGet(SSI0_BASE, &pui32DataRx[ui32Index]);

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);


Data32 = + ((uint32_t)pui32DataRx[1] << 8) + ((uint32_t)pui32DataRx[2] << 16) + ((uint32_t)pui32DataRx[3] << 24);
return (Data32);
}

uint16_t rd16(uint32_t address)
{
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);

SSIDataPut(SSI0_BASE,(address >> 16) & 0x3F);
SSIDataPut(SSI0_BASE,(address >> 8) & 0xff);
SSIDataPut(SSI0_BASE,address & 0xff);

 SSIDataGet(SSI0_BASE, &pui32DataRx[ui32Index]);

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);

uint16_t Data16 = pui32DataRx[0] + ((uint16_t)pui32DataRx[1] << 8);
 return (Data16);
}

uint8_t rd8(uint32_t address)
{


GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);

SSIDataPut(SSI0_BASE,(address >> 16) & 0x3F);
SSIDataPut(SSI0_BASE,(address >> 8) & 0xff);
SSIDataPut(SSI0_BASE,address & 0xff);

SSIDataGet(SSI0_BASE, &pui32DataRx[ui32Index]);

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);

return (pui32DataRx[0]);
}

// Read the specific ID register and return TRUE if it is the expected 0x7C otherwise.
uint8_t Cmd_READ_REG_ID(void)
{
uint32_t pui32DataRx[2];

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, 0);

SSIDataPut(SSI0_BASE,0x30); // Base address RAM_REG = 0x302000
SSIDataPut(SSI0_BASE,0x20);
SSIDataPut(SSI0_BASE,REG_ID); // REG_ID offset = 0x00
SSIDataPut(SSI0_BASE,0x00);

SSIDataGet(SSI0_BASE, &pui32DataRx[ui32Index]); // There was a dummy read of the first byte in there

SSIDataPut(SSI0_BASE,0x00);

GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);


if (pui32DataRx[0] == 0x7C) // FT81x Datasheet section 5.1, Table 5-2. Return value always 0x7C
{

return 1;
}
else
{

return 0;
}
}

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////hedder file     ------------------>  ft812.h

/*
* FT812.h
*
* Created on: Dec 20, 2020
* Author: gk
*/

#ifndef FT812_H_
#define FT812_H_

// =====================================================================================
// Required Functions - Hardware driver or otherwise environment specific. Abstracted |
// and found in ArduinoAL.h or whatever the abstraction layer is called in your world. |
// This library requires base support functions for SPI, delays, and hardware pin |
// control. |
// =====================================================================================
#undef DISPLAY

// Once again, if this is being used for Arduino, it wants C++, but C is totally cool as long as it is
// wrapped in this extern declaration (also see the bottom of the file for the close bracket)

#ifdef __cplusplus
extern "C" {
#endif

#define HCMD_ACTIVE 0x00
#define HCMD_STANDBY 0x41
#define HCMD_SLEEP 0x42
#define HCMD_PWRDOWN 0x50
#define HCMD_CLKINT 0x48
#define HCMD_CLKEXT 0x44
#define HCMD_CLK48M 0x62
#define HCMD_CLK36M 0x61
#define HCMD_CORERESET 0x68

#define CMD_APPEND 0xFFFFFF1E
#define CMD_BGCOLOR 0xFFFFFF09
#define CMD_BUTTON 0xFFFFFF0D
#define CMD_CALIBRATE 0xFFFFFF15 // 4294967061UL
#define CMD_CLOCK 0xFFFFFF14
#define CMD_COLDSTART 0xFFFFFF32
#define CMD_CRC 0xFFFFFF18
#define CMD_DIAL 0xFFFFFF2D
#define CMD_DLSTART 0xFFFFFF00
#define CMD_FGCOLOR 0xFFFFFF0A
#define CMD_GAUGE 0xFFFFFF13
#define CMD_GETMATRIX 0xFFFFFF33
#define CMD_GETPROPS 0xFFFFFF25
#define CMD_GETPTR 0xFFFFFF23
#define CMD_GRADCOLOR 0xFFFFFF34
#define CMD_GRADIENT 0xFFFFFF0B
#define CMD_INFLATE 0xFFFFFF22
#define CMD_INTERRUPT 0xFFFFFF02
#define CMD_KEYS 0xFFFFFF0E
#define CMD_LOADIDENTITY 0xFFFFFF26
#define CMD_LOADIMAGE 0xFFFFFF24
#define CMD_LOGO 0xFFFFFF31
#define CMD_MEDIAFIFO 0xFFFFFF39
#define CMD_MEMCPY 0xFFFFFF1D
#define CMD_MEMCRC 0xFFFFFF18
#define CMD_MEMSET 0xFFFFFF1B
#define CMD_MEMWRITE 0xFFFFFF1A
#define CMD_MEMZERO 0xFFFFFF1C
#define CMD_NUMBER 0xFFFFFF38
#define CMD_PLAYVIDEO 0xFFFFFF3A
#define CMD_PROGRESS 0xFFFFFF0F
#define CMD_REGREAD 0xFFFFFF19
#define CMD_ROTATE 0xFFFFFF29
#define CMD_SCALE 0xFFFFFF28
#define CMD_SCREENSAVER 0xFFFFFF2F
#define CMD_SCROLLBAR 0xFFFFFF11
#define CMD_SETBITMAP 0xFFFFFF43
#define CMD_SETFONT 0xFFFFFF2B
#define CMD_SETMATRIX 0xFFFFFF2A
#define CMD_SKETCH 0xFFFFFF30
#define CMD_SLIDER 0xFFFFFF10
#define CMD_SNAPSHOT 0xFFFFFF1F
#define CMD_SPINNER 0xFFFFFF16
#define CMD_STOP 0xFFFFFF17
#define CMD_SWAP 0xFFFFFF01
#define CMD_TEXT 0xFFFFFF0C
#define CMD_TOGGLE 0xFFFFFF12
#define CMD_TRACK 0xFFFFFF2C
#define CMD_TRANSLATE 0xFFFFFF27
#define CMD_VIDEOFRAME 0xFFFFFF41
#define CMD_VIDEOSTART 0xFFFFFF40

#define DLSWAP_FRAME 2UL

#define OPT_CENTER 1536UL
#define OPT_CENTERX 512UL
#define OPT_CENTERY 1024UL
#define OPT_FLAT 256UL
#define OPT_MONO 1UL
#define OPT_NOBACK 4096UL
#define OPT_NODL 2UL
#define OPT_NOHANDS 49152UL
#define OPT_NOHM 16384UL
#define OPT_NOPOINTER 16384UL
#define OPT_NOSECS 32768UL
#define OPT_NOTICKS 8192UL
#define OPT_RIGHTX 2048UL
#define OPT_SIGNED 256UL

// Definitions for FT8xx co processor command buffer

#define FT_DL_SIZE (8*1024) // 8KB Display List buffer size
#define FT_CMD_FIFO_SIZE (4*1024) // 4KB coprocessor Fifo size
#define FT_CMD_SIZE (4) // 4 byte per coprocessor command of EVE

// Memory block base addresses

#define RAM_G 0x0
#define RAM_DL 0x300000
#define RAM_REG 0x302000
#define RAM_CMD 0x308000

// Graphics Engine Registers - FT81x Series Programmers Guide Section 3.1
// Addresses defined as offsets from the base address called RAM_REG and located at 0x302000
// Discussion: Defining this way leads to an additional add operation in code that can be avoided by defining
// these addresses as 32 bit values, but this is easily paid for in clarity and coorelation to documentation.
// Further, you can add defines together in code and allow the precompiler to do the add operation (as here).

#define REG_CSPREAD 0x68
#define REG_DITHER 0x60
#define REG_DLSWAP 0x54
#define REG_HCYCLE 0x2C
#define REG_HOFFSET 0x30
#define REG_HSIZE 0x34
#define REG_HSYNC0 0x38
#define REG_HSYNC1 0x3C
#define REG_OUTBITS 0x5C
#define REG_PCLK 0x70
#define REG_PCLK_POL 0x6C
#define REG_PLAY 0x8C
#define REG_PLAYBACK_FORMAT 0xC4
#define REG_PLAYBACK_FREQ 0xC0
#define REG_PLAYBACK_LENGTH 0xB8
#define REG_PLAYBACK_LOOP 0xC8
#define REG_PLAYBACK_PLAY 0xCC
#define REG_PLAYBACK_READPTR 0xBC
#define REG_PLAYBACK_START 0xB4
#define REG_PWM_DUTY 0xD4
#define REG_ROTATE 0x58
#define REG_SOUND 0x88
#define REG_SWIZZLE 0x64
#define REG_TAG 0x7C
#define REG_TAG_X 0x74
#define REG_TAG_Y 0x78
#define REG_VCYCLE 0x40
#define REG_VOFFSET 0x44
#define REG_VOL_SOUND 0x84
#define REG_VOL_PB 0x80
#define REG_VSYNC0 0x4C
#define REG_VSYNC1 0x50
#define REG_VSIZE 0x48

// Touch Screen Engine Registers - FT81x Series Programmers Guide Section 3.3
// Addresses defined as offsets from the base address called RAM_REG and located at 0x302000

#define REG_TOUCH_CONFIG 0x168
#define REG_TOUCH_TRANSFORM_A 0x150
#define REG_TOUCH_TRANSFORM_B 0x154
#define REG_TOUCH_TRANSFORM_C 0x158
#define REG_TOUCH_TRANSFORM_D 0x15C
#define REG_TOUCH_TRANSFORM_E 0x160
#define REG_TOUCH_TRANSFORM_F 0x164

// Resistive Touch Engine Registers - FT81x Series Programmers Guide Section 3.3.3 - Document confused
// Addresses defined as offsets from the base address called RAM_REG and located at 0x302000

#define REG_TOUCH_ADC_MODE 0x108
#define REG_TOUCH_CHARGE 0x10C
#define REG_TOUCH_DIRECT_XY 0x18C
#define REG_TOUCH_DIRECT_Z1Z2 0x190
#define REG_TOUCH_MODE 0x104
#define REG_TOUCH_OVERSAMPLE 0x114
#define REG_TOUCH_RAW_XY 0x11C
#define REG_TOUCH_RZ 0x120
#define REG_TOUCH_RZTHRESH 0x118
#define REG_TOUCH_SCREEN_XY 0x124
#define REG_TOUCH_SETTLE 0x110
#define REG_TOUCH_TAG 0x12C
#define REG_TOUCH_TAG_XY 0x128

// Capacitive Touch Engine Registers - FT81x Series Programmers Guide Section 3.3.4
// Addresses defined as offsets from the base address called RAM_REG and located at 0x302000

#define REG_CTOUCH_MODE 0x104
#define REG_CTOUCH_EXTEND 0x108
#define REG_CTOUCH_RAW_XY 0x11C
#define REG_CTOUCH_TOUCH_XY 0x124
#define REG_CTOUCH_TOUCH1_XY 0x11C
#define REG_CTOUCH_TOUCH2_XY 0x18C
#define REG_CTOUCH_TOUCH3_XY 0x190
#define REG_CTOUCH_TOUCH4_X 0x16C
#define REG_CTOUCH_TOUCH4_Y 0x120
#define REG_CTOUCH_TAG 0x12C
#define REG_CTOUCH_TAG1 0x134
#define REG_CTOUCH_TAG2 0x13C
#define REG_CTOUCH_TAG3 0x144
#define REG_CTOUCH_TAG4 0x14C
#define REG_CTOUCH_TAG_XY 0x128
#define REG_CTOUCH_TAG1_XY 0x130
#define REG_CTOUCH_TAG2_XY 0x138
#define REG_CTOUCH_TAG3_XY 0x140
#define REG_CTOUCH_TAG4_XY 0x148

// Co-processor Engine Registers - FT81x Series Programmers Guide Section 3.4
// Addresses defined as offsets from the base address called RAM_REG and located at 0x302000

#define REG_CMD_DL 0x100
#define REG_CMD_READ 0xF8
#define REG_CMD_WRITE 0xFC
#define REG_CMDB_SPACE 0x574
#define REG_CMDB_WRITE 0x578

// Special Registers - FT81x Series Programmers Guide Section 3.5
// Addresses assumed to be defined as offsets from the base address called RAM_REG and located at 0x302000

#define REG_TRACKER 0x7000
#define REG_TRACKER_1 0x7004
#define REG_TRACKER_2 0x7008
#define REG_TRACKER_3 0x700C
#define REG_TRACKER_4 0x7010
#define REG_MEDIAFIFO_READ 0x7014
#define REG_MEDIAFIFO_WRITE 0x7018

// Miscellaneous Registers - FT81x Series Programmers Guide Section 3.6 - Document inspecific about base address
// Addresses assumed to be defined as offsets from the base address called RAM_REG and located at 0x302000

#define REG_CPU_RESET 0x20
#define REG_PWM_DUTY 0xD4
#define REG_PWM_HZ 0xD0
#define REG_INT_MASK 0xB0
#define REG_INT_EN 0xAC
#define REG_INT_FLAGS 0xA8
#define REG_GPIO 0x94
#define REG_GPIO_DIR 0x90
#define REG_GPIOX 0x9C
#define REG_GPIOX_DIR 0x98
#define REG_FREQUENCY 0x0C
#define REG_CLOCK 0x08
#define REG_FRAMES 0x04
#define REG_ID 0x00
#define REG_TRIM 0x10256C
#define REG_SPI_WIDTH 0x180

// Primitive Type Reference Definitions - FT81x Series Programmers Guide Section 4.5 - Table 6

#define BITMAPS 1
#define POINTS 2
#define LINES 3
#define LINE_STRIP 4
#define EDGE_STRIP_R 5
#define EDGE_STRIP_L 6
#define EDGE_STRIP_A 7
#define EDGE_STRIP_B 8
#define RECTS 9

// Bitmap Layout Format Definitions - FT81x Series Programmers Guide Section 4.7 - Table 7

#define ARGB1555 0
#define L1 1
#define L4 2
#define L8 3
#define RGB332 4
#define ARGB2 5
#define ARGB4 6
#define RGB565 7
#define TEXT8X8 9
#define TEXTVGA 10
#define BARGRAPH 11
#define PALETTED565 14
#define PALETTED4444 15
#define PALETTED8 16
#define L2 17

// Bitmap Parameters

#define REPEAT 1
#define BORDER 0
#define NEAREST 0
#define BILINEAR 1

// These defined "macros" are supplied by FTDI - Manufacture command bit-fields from parameters

// FT81x Series Programmers Guide is refered to as "FT-PG"

#define CLEAR(c,s,t) ((38UL<<24)|(((c)&1UL)<<2)|(((s)&1UL)<<1)|(((t)&1UL)<<0)) // CLEAR - FT-PG Section 4.21
#define CLEAR_COLOR_RGB(red,green,blue) ((2UL<<24)|(((red)&255UL)<<16)|(((green)&255UL)<<8)|(((blue)&255UL)<<0)) // CLEAR_COLOR_RGB - FT-PG Section 4.23
#define COLOR_RGB(red,green,blue) ((4UL<<24)|(((red)&255UL)<<16)|(((green)&255UL)<<8)|(((blue)&255UL)<<0)) // COLOR_RGB - FT-PG Section 4.28
#define VERTEX2II(x,y,handle,cell) ((2UL<<30)|(((x)&511UL)<<21)|(((y)&511UL)<<12)|(((handle)&31UL)<<7)|(((cell)&127UL)<<0)) // VERTEX2II - FT-PG Section 4.48
#define VERTEX2F(x,y) ((1UL<<30)|(((x)&32767UL)<<15)|(((y)&32767UL)<<0)) // VERTEX2F - FT-PG Section 4.47
#define CELL(cell) ((6UL<<24)|(((cell)&127UL)<<0)) // CELL - FT-PG Section 4.20
#define BITMAP_HANDLE(handle) ((5UL<<24) | (((handle) & 31UL) << 0)) // BITMAP_HANDLE - FT-PG Section 4.06
#define BITMAP_SOURCE(addr) ((1UL<<24)|(((addr)&1048575UL)<<0)) // BITMAP_SOURCE - FT-PG Section 4.11
#define BITMAP_LAYOUT(format,linestride,height) ((7UL<<24)|(((format)&31UL)<<19)|(((linestride)&1023UL)<<9)|(((height)&511UL)<<0)) // BITMAP_LAYOUT - FT-PG Section 4.07
#define BITMAP_SIZE(filter,wrapx,wrapy,width,height) ((8UL<<24)|(((filter)&1UL)<<20)|(((wrapx)&1UL)<<19)|(((wrapy)&1UL)<<18)|(((width)&511UL)<<9)|(((height)&511UL)<<0)) // BITMAP_SIZE - FT-PG Section 4.09
#define TAG(s) ((3UL<<24)|(((s)&255UL)<<0)) // TAG - FT-PG Section 4.43
#define POINT_SIZE(sighs) ((13UL<<24)|(((sighs)&8191UL)<<0)) // POINT_SIZE - FT-PG Section 4.36
#define BEGIN(PrimitiveTypeRef) ((31UL<<24)|(((PrimitiveTypeRef)&15UL)<<0)) // BEGIN - FT-PG Section 4.05
#define END() ((33UL<<24)) // END - FT-PG Section 4.30
#define DISPLAY() ((0UL<<24)) // DISPLAY - FT-PG Section 4.29

// Non FTDI Helper Macros

#define MAKE_COLOR(r,g,b) (( r << 16) | ( g << 8) | (b))

// Global Variables
extern uint16_t FifoWriteLocation;

// Function Prototypes

void PD_Reset(void);

void Host_Command(uint8_t HostCommand);
void wr32(uint32_t address, uint32_t parameter);
void wr16(uint32_t, uint16_t parameter);
void wr8(uint32_t, uint8_t parameter);
uint8_t rd8(uint32_t RegAddr);
uint16_t rd16(uint32_t RegAddr);
uint32_t rd32(uint32_t RegAddr);

void Send_CMD(uint32_t data);
void UpdateFIFO(void);

uint8_t Cmd_READ_REG_ID(void);

// Widgets and other significant screen objects

void Cmd_Slider(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t options, uint16_t val, uint16_t range);
void Cmd_Spinner(uint16_t x, uint16_t y, uint16_t style, uint16_t scale);
void Cmd_Gauge(uint16_t x, uint16_t y, uint16_t r, uint16_t options, uint16_t major, uint16_t minor, uint16_t val, uint16_t range);
void Cmd_Dial(uint16_t x, uint16_t y, uint16_t r, uint16_t options, uint16_t val);
void Cmd_Track(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t tag);
void Cmd_Number(uint16_t x, uint16_t y, uint16_t font, uint16_t options, uint32_t num);
void Cmd_Gradient(uint16_t x0, uint16_t y0, uint32_t rgb0, uint16_t x1, uint16_t y1, uint32_t rgb1);
void Cmd_Button(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t font, uint16_t options, const char* str);
void Cmd_Text(uint16_t x, uint16_t y, uint16_t font, uint16_t options, const char* str);

void Cmd_SetBitmap(uint32_t addr, uint16_t fmt, uint16_t width, uint16_t height);
void Cmd_Memcpy(uint32_t dest, uint32_t src, uint32_t num);
void Cmd_GetPtr(void);
void Cmd_GradientColor(uint32_t c);
void Cmd_FGcolor(uint32_t c);
void Cmd_Translate(uint32_t tx, uint32_t ty);
void Cmd_Rotate(uint32_t a);
void Cmd_Scale(uint32_t sx, uint32_t sy);
void Cmd_Calibrate(uint32_t result);

uint16_t CoProFIFO_FreeSpace(void);
void Wait4CoProFIFO(uint32_t room);
void Wait4CoProFIFOEmpty(void);
void StartCoProTransfer(uint32_t address, uint8_t reading);
void CoProWrCmdBuf(const uint8_t *buffer, uint32_t count);

uint32_t WriteBlockRAM(uint32_t Add, const uint8_t *buff, uint32_t count);

// Panel specific setup parameters

//User selectable configurations.

#define EVE2_50


#ifdef EVE2_50

#define DWIDTH 800
#define DHEIGHT 480
#define PIXVOFFSET 0
#define PIXHOFFSET 0
#define HCYCLE 928
#define HOFFSET 88
#define HSYNC0 0
#define HSYNC1 48
#define VCYCLE 525
#define VOFFSET 32
#define VSYNC0 0
#define VSYNC1 3
#define PCLK 2
#define SWIZZLE 0
#define PCLK_POL 1
#define HSIZE 800
#define VSIZE 480
#define CSPREAD 0
#define DITHER 1
#endif


#ifdef __cplusplus
}
#endif


#endif /* FT812_H_ */

  • 0
    Intellectual 490 points

    datasheet_ft81x.pdfFT81X_Series_Programmer_Guide.pdf

     am attaching datasheet for slave device interface with tm4c1294ncpdt 

  • 0
    TI__Guru*** 135355 points

    Hello Govind,

    Can you share more details about what specifically you believe is failing here regarding the SPI module?

    We are TM4C device experts and do not have any experience with this LCD screen. If you have a question about how to make the SPI module operate in a specific manner, please describe how you need the SPI module to work and then I can try and offer guidance. But I am not in a position to review the LCD datasheet in depth and then debug your application.

  • 0 in reply to Ralph Jacobi
    Intellectual 490 points

    1488.datasheet_ft81x.pdfgen4-ft81x_datasheet_r_1_2.pdf

    hello Ralph Jacobi 

    i want to just communication with this display driver ft812 this is spi operated.
    issue is
    1- i am unable to communication device.
    2- unable to read chip id (0x7c).
    3-i want just enable the chip and communication with display .


    i unable to get chip id to using ssigetdata(ssi0,---)

    i am already attached my reference code and ther header file.

    i want jft812 chip active and communication with display

  • 0 in reply to Ralph Jacobi
    Intellectual 490 points

    i am follow this sequence but i am wrong some where that i don't know.

  • 0 in reply to GOVIND PADHIYAR
    TI__Guru*** 135355 points

    Hello Govind,

    Looking at your SSI configuration code, I do not see the MISO line being configured at all. You would not get data back from the device without that being configured. For SSI, data is sent from MCU over MOSI and received from the target device over MISO. So that is the first thing you need to adjust if you are expecting data back and are using SSIGetData.

    After doing so, you should also look with an oscilloscope or logic state analyzer to make sure you are sending data in the correct format based on the LCD specs. If you are seeing any discrepancies with how the MCU is transmitting data and what is expected by the display, then you can describe those and I can further help with adjusting the configuration of the SSI peripheral. One thing to check always is the SPI mode used for Polarity and Phase. It looks like you are using Mode 1 which is Low Clock, Falling Edge latch. Make sure that matches with your display.

  • 0 in reply to Ralph Jacobi
    Intellectual 490 points

    sorry   

    it my misteck in posting 

    i am alredy mention that line in my updated code


    void SSI0_int(void)
    {
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);

    GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);
    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_2MA,GPIO_PIN_TYPE_STD); // Make default state as Pull- up.

    GPIOPinConfigure(GPIO_PA2_SSI0CLK);
    GPIOPinConfigure(GPIO_PA4_SSI0XDAT0);
    GPIOPinConfigure(GPIO_PA5_SSI0XDAT1);
    GPIOPinTypeSSI(GPIO_PORTA_BASE,GPIO_PIN_5|GPIO_PIN_4|GPIO_PIN_2);

    SSIConfigSetExpClk(SSI0_BASE, ui32SysClkFreq, SSI_FRF_MOTO_MODE_1, SSI_MODE_MASTER, 1000000, 8);
    SSIEnable(SSI0_BASE);
    }

  • 0 in reply to GOVIND PADHIYAR
    TI__Guru*** 135355 points

    Hello Govind,

    According to the datasheet for your FTDI chip:

    The QSPI slave interface operates up to 30MHz. Only SPI mode 0 is supported. Refer to section 6.4.2 for detailed timing specification. The QSPI can be configured as a SPI slave in SINGLE, DUAL or QUAD channel modes.

    So use SSI_FRF_MOTO_MODE_0.

    After that, you need to look at the SPI signals with a measurement device to see what is being output. Because otherwise this is just blind debugging. 

  • 0 in reply to Ralph Jacobi
    Intellectual 490 points

    i am change this point in my code but i am not success
    i am share this datasheet of ft812 slave address is 0x7c
    and i am geting garbage value pls i want to just read chipid pls tell me working sample module for read chip id for that.

    github.com/.../Eve2_81x.c

    its my reference code for arduino i am modified in ccs software where is my fault i am confused and not able to read my error 

  • 0 in reply to GOVIND PADHIYAR
    TI__Guru*** 135355 points

    Hello Govind,

    Maybe I should help explain what we offer on E2E forums. We are TI device experts and we try to help all customers with questions regarding our devices and how to use them. However, we do not write code for custom applications to interface with non-TI components or generally have experience with such products unless we offer a BoosterPack for them.

    From what you are asking here, you are wanting our aid in fixing your code to talk with your display based on the specifications of the display module, and that is beyond what we can offer here.

    What I can offer however, is guidance on how to use TivaWare to achieve what you are seeking. And to do that, you need to provide me more detail about:

    1) What is currently happening with the SPI bus to the display

    2) What is wrong with the SPI bus where it is not meeting the specifications of your display.

    Once I understand those pieces, I can guide you on how to properly adjust the SPI interface for the TM4C to achieve your goal. But I am not able to debug your application to understand those pieces.

    I would recommend you get an oscilloscope and monitor the signals yourself and also compare the waveforms you have to the datasheet so you can verify that everything looks okay. If something isn't configured right, then come back with the oscilloscope capture and tell me what is wrong about it, and then I can help you fix that in the MCU.

  • 0 in reply to Ralph Jacobi
    Intellectual 490 points

    thanks for your responce can you share only 8 bit addresh read democode using spi 

  • 0 in reply to GOVIND PADHIYAR
    TI__Guru*** 135355 points

    Hello Govind,

    We have basic SPI demos in the following TivaWare folder: [Install Path]\TivaWare_C_Series-2.2.0.295\examples\peripherals\ssi

    The spi_master.c file would be what you are looking for.