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CCS/TMS320F28388D: TMS320F28388D tcpEchoF2838X issues

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software: Code Composer Studio

Hello, I have a TMS320F28388D rev MCU063A with docking station and am trying to make the tcp echo example build. I am getting the issue below. I can build fine but not run the code. It also says the source is not found at the top left of the image. I even tried creating a new target config file but same issue

Include paths:

Console Output:

C28xx_CPU1: GEL Output:
Memory Map Initialization Complete
C28xx_CPU1: GEL Output:
... DCSM Initialization Start ...
C28xx_CPU1: GEL Output:
... DCSM Initialization Done ...
C28xx_CPU1: GEL Output:
CPU2 is out of reset and configured to wait boot.
(If you connected previously, may have to resume CPU2 to reach wait boot loop.)
C28xx_CPU1: GEL Output:
CM is out of reset and configured to wait boot.
(If you connected previously, may have to resume CM to reach wait boot loop.)
C28xx_CPU1: GEL Output:
... DCSM Initialization Start ...
C28xx_CPU1: GEL Output:
... DCSM Initialization Done ...
C28xx_CPU1: GEL Output:
CPU2 is out of reset and configured to wait boot.
(If you connected previously, may have to resume CPU2 to reach wait boot loop.)
C28xx_CPU1: GEL Output:
CM is out of reset and configured to wait boot.
(If you connected previously, may have to resume CM to reach wait boot loop.)
C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
Cortex_M4_0: GEL Output: Memory Map Initialization Complete
Cortex_M4_0: GEL Output: Windowed Watchdog Enabled
Cortex_M4_0: GEL Output: UART0 Enabled
Cortex_M4_0: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
Cortex_M4_0: AutoRun: Target not run as breakpoint could not be set: _JobHardwareBreakpoint::ARM_DEBUG_V7M_fpb_add_breakpoint: FPB : All resources are in use.[25062]

  • Part Number: TMS320F28388D

    Tool/software: Code Composer Studio

    Part Number: TMS320F28388D

    Tool/software: Code Composer Studio

    Hello, I have a TMS320F28388D rev MCU063A with docking station and am trying to make the enet_lwip example to build. I am getting the issue below. I can build fine but not run the code. It also says the source is not found at the top left of the image. I even tried creating a new target config file but same issue

    Include paths:

    Console Output:

    C28xx_CPU1: GEL Output:
    Memory Map Initialization Complete
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Start ...
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output:
    CPU2 is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Start ...
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output:
    CPU2 is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
    C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: GEL Output: Memory Map Initialization Complete
    Cortex_M4_0: GEL Output: Windowed Watchdog Enabled
    Cortex_M4_0: GEL Output: UART0 Enabled
    Cortex_M4_0: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.

  • John,

    Looks like this is duplicate thread. I will close this as we will be tracking first thread on this.

    e2e.ti.com/.../967530

  • I am experiencing issues with both examples, the enet_lwip and tcpecho. Please do not close this thread, I need help with both. Also, what does the breakpoint at a memory location outside of program code mean? I need urgent help

  • Hi John,

    Both the examples are meant to be run in CM or M4 processor. From the image i see that you are loading the binary in CPU1 which was generated for CM.

    You need to first build and the load the cm_common_config_c28x example in C2000Ware with predefined symbol ethernet in CPU1 and the load the lwip example in CM.

    You can select the processor in the debug session to load to a certain CPU.

    Thanks,

    Yashwant 

  • Hi Yashwant,

    Thank you for the response! I loaded and built cm_common_config_c28x example succesfully and made sure to select CPU1 at the start of the debugging session. However, when I load the lwip example after running the previous program I still get same issue as before. How do I load the lwip example in CM? Would you mind showing a step-by-step process of how to do this? If CPU1 is CM, then how do I get the option to select the right one?

    Do I do this here?

    I tried only selecting the CPU1 related objects however get same issue

    I have also tried just selecting C28xx_CPU1 but same error

    My device is also set up for a 20Mhz clock. I am not sure if that is why in the cm_common example I get stuck in the while loop(see below). Would this cause an issue with the tcpecho/enet_lwip examples?:

    Many Thanks,

    John

  • John,

    There are 2 things first as your device has 20MHz clock use predefined symbol USE_20MHZ_XTAL and CM is cortex M4 so you need to load the lwIP binary in cortex M4 and not CPU1.

    Refer to following e2e for more information on steps.

    Regards,

    Yashwant

  • Ok I tried selecting Cortex_M4_0 and do not get taken to the hex file anymore. It says the code is running at top but I never pressed the green run button and it doesn`t let me. I do not think the tcpecho example is running, enet_lwip works though:

    Console output:

    C28xx_CPU1: GEL Output:
    Memory Map Initialization Complete
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Start ...
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output:
    CPU2 is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Start ...
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output:
    CPU2 is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
    C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: GEL Output: Memory Map Initialization Complete
    Cortex_M4_0: GEL Output: Windowed Watchdog Enabled
    Cortex_M4_0: GEL Output: UART0 Enabled
    Cortex_M4_0: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: AutoRun: Target not run as breakpoint could not be set: _JobHardwareBreakpoint::ARM_DEBUG_V7M_fpb_add_breakpoint: FPB : All resources are in use.[25062]

    I also defined the oscilator freq. in the device.h file like you said and now I don`t enter that while loop

    I am also tried to run the python code(tcpSendRecieve.py) in visual studio however I cannot open the socket: I made sure to set the MAC/Physical address correctly but not sure about IP address so I used the one provided in the example readme.md:

    Thanks for the quick responses!

    Regards,

    John

  • I was hoping I could get the tcpecho example, modify it, and have my arduino with ethernet capability read a register from my control card. If someone can give my guidance on how to setup simple communication that would be very much appreciated. I have been trying to accomplish this for about a month and it has proven very difficult, navigating between examples with some working and some that have taken hours to configure.

  • I also tried pinging the enet_lwip example but I get no response see below:

    What am I doing wrong with testing the lwip example?

    Regards,

    John

  • Part Number: TMS320F28388D

    Tool/software: Code Composer Studio

    I cannot run the tcpEchoF2838X example. Can someone explain why it is not running? Need Urgent help. I have the Cortex M4 selected at the start of the debug session:

    Console Output:

    C28xx_CPU1: GEL Output:
    Memory Map Initialization Complete
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Start ...
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output:
    CPU2 is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Start ...
    C28xx_CPU1: GEL Output:
    ... DCSM Initialization Done ...
    C28xx_CPU1: GEL Output:
    CPU2 is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CPU2 to reach wait boot loop.)
    C28xx_CPU1: GEL Output:
    CM is out of reset and configured to wait boot.
    (If you connected previously, may have to resume CM to reach wait boot loop.)
    C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. User code execution from SR could commence after both flash banks are programmed.
    C28xx_CPU1: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: GEL Output: Memory Map Initialization Complete
    Cortex_M4_0: GEL Output: Windowed Watchdog Enabled
    Cortex_M4_0: GEL Output: UART0 Enabled
    Cortex_M4_0: Only CPU1 on-chip Flash Plugin can configure clock for CPU1, CPU2 and CM Flash operations. Plugin automatically configures PLL when CPU1 Flash operations are invoked. However, if users want to do only CPU2 or CM Flash operations without doing a prior CPU1 operation in the current session, they should click on 'Configure Clock' button in CPU1's on-chip Flash Plugin before invoking CPU2 and CM Flash operations. When this button is used, Flash Plugin will configure the clock for CPU1/CPU2 at 190MHz and CM at 95MHz using INTOSC2 as the clock source. Plugin will leave PLL config like this and user application should configure the PLL as required by application.
    Cortex_M4_0: AutoRun: Target not run as breakpoint could not be set: _JobHardwareBreakpoint::ARM_DEBUG_V7M_fpb_add_breakpoint: FPB : All resources are in use.[25062]

    I also cannot open the Runtime object view, it says waiting for debugger to be started but nothing happens and I can`t press the green arrow play button.

    Regards,

    John

  • John,

    You created another thread on same topic. Please use that thread to debug.

    https://e2e.ti.com/support/tools/ccs/f/81/t/967530

    I am closing this thread and also please do not create duplicate thread on same topic.

    Another thing, due to holiday, most of the folks are out of office. Next week, ethernet expert will help you.

  • John,

    For lwIP example did you configure the the IP address of your laptop to 192.168.0.3 or anything other than 192.168.0.4. And subnet mask to 255.255.255.0 . This is to make sure the control card and your workstation are in same network.

    Regards,

    Yashwant

  • No my computers Ipv4 address is 192.168.1.3 and I changed the address of the cotnrol card to be 0xC0A80104 (192.168.1.4) here:

    Regards,

    John

  • While you are sending ping request do you see any change in the Ethernet_rxBuffer in the expression window. Check If the variables Ethernet_rxInterruptCount and Ethernet_txInterruptCount are incrementing. If these counters are not incrementing with the broadcast packets of ARP it may mean that your control card is not connected to the network.

    Try connecting the control card directly to you computer without any router and use static address allocation.

    Regards,

    Yashwant

  • Yes I beleive my control card is not connecting to my network since the values are not incrementing when I ping 192.168.1.4. I have an ethernet cable going from the port on the control card to my laptop. What should I double check in the code and which files?

    cmd window:

    There was an instance where I think I was able to ping but if I did it again, most of the time the response would be "time out"(see below). The values in the expression window did NOT change during this time:

    Regards,

    John

  • Is the IP address 192.168.1.3 of your laptop assigned to your wifi adapter or is it for ethernet. 

    When you connect the ethernet cable do you see ethernet connection in "Control Panel\Network and Internet\Network and Sharing Center". Assign a static ip address to the ethernet port of the laptop and make sure the host network of ethernet is different from that of wifi. 

    Regards,

    Yashwant 

  • 192.168.1.3 is the address assigned to my wifi adapter. I currently do not have  a static IP address set in the ethernet port maybe this is the issue. I now changed the IP address to be 192.168.0.4 (like the readme.txt says) in the code and I assigned the following IPv4 address (192.168.0.1) and subnet to my ethernet port?:

    However, still the request times out. I can ping 192.168.0.1 however, which is my static ethernet port IPv4 address.

    I still think my control card is not connecting to my network as seen in image below:

    I currently have an ethernet cable going from the cotnrol card to my PC which is connected to the internet over WiFi 

    Regards,

    John

  • Also, how would I establish communication with my arduino?

    Regards,

    John

  • There are 3 RJ45 Connectors on the control card. Have you connected the cable to J4 (the side which has single connector). Other 2 sockets belong to EtherCAT.

    You can use simple SCI to communicate with arduino. Go through sci_echoback example for reference. 

    Regards,

    Yashwant

  • Yes I have connected the side of the control card with the single RJ45 connector connected to an ethernet port on my laptop.

    I tried sharing the wifi connection through the ethernet port of my laptop to another laptop and it was able to connect to my network.

    Could it be the cm_common_config_c28x wasn`t run properly? Are there ways to check if the pinmux config is set correctly?

    Also, when the program is running, if I hit the yellow pause button I get the error below. Is this normal?

    Also, if I step over(f6) line by line I can never get past the line 365, Ethernet_init function below. It seems the program gets stuck in a loop and can not reach line 370:

    If I step into(f5) this function I get the file cannot be found at the line 243 below:

    In other words, if I place a breakpoint line 244 in enet_lwip.c , I never reach it when I press the green play button:

    I checked my file explorer and I do have ethernet.c next to ethernet.h so I do not know why CCS is not able to grab that file? Path below

    C:\ti\c2000\C2000Ware_3_03_00_00_Software\driverlib\f2838x\driverlib_cm

    Include paths:

    The following link seems to describe a similair issue: https://e2e.ti.com/support/microcontrollers/c2000/f/171/t/957647?CCS-TMS320F28388D-unable-to-run-Ethernet-examples

    Regards,

    John

  • I do have Ethernet defined and am using the 20Mhz define as seen below. Could it be the config file is not the correct one?

    Regards,

    John

  • John,

    The config file is the correct one. Your code is getting stuck in the software reset of the Ethernet. This happens when the clocking to ethernet or pinmux is not configured properly.

    From the images posted by you in previous reply, in the debug session i only see the cortex_m4 running. The CPU1 also needs to be run along with it which configures the pinmux and clock. 

    Regards,

    Yashwant

  • Ok Like this?

    I will run the common_config file with the settings above. Stop the program and run enet_lwip with the settings in the first picture?

    If I do this I get the error below of Source not found:

    Regards,

    John

  • You can just lauch the debug session once with both cpu1 and cm selected. You can load the project binary from the debug session by selecting the device and clicking on load (ctrl + alt + L). Load the cm_common_config_c28x.out to cpu1 and enet_lwip.out to cm. You dont have to launch the debug session again for cm or cpu1.

    -Yashwant

  • Is this how the files would be run? Initilaly I select CPU1 and CM and start the debug session. Then, I click on each device in the debug window and load the apprpriate file into each core? I run the config file and then the enet_lwip example correct? They should be running at same time

    Image below shows how to load common_config_c28x file into CPU1 using ctrl+alt+L

    Image below shows both files running on their respective cores:

    Thank you for helping me with this, I was not aware of this step

    Regards,

    John

  • John,

    Right, that way you can load to any number of devices in the debug session. Make sure you run the CPU1 first and then the CM.

    While halting in library source if the file is not found you can use locate file to add to the debug.

    Regards,

    Yashwant 

  • I just edited my post before your reply above, please see above. I am running both files at same time

    Regards,

    John

  • Yes both the devices should be in running state. Is the ping reply working now?

    -Yashwant

  • I beleive it works once then doesn`t update the expression window after that. The expression window tx interrupt changes from 0 to 1 but stays constant if i ping again. If I ping again, the value stays at 1. I have a static IP address of my ethernet port set to 192.168.0.1

    Why would the interrupt fire once and then not again after?

    Regards,

    John

  • Ok so the tx interrupt increments upon startup. Not because of my ping.

    Regards,

    John

  • May I know which version of C2000Ware are you using. Is it 3.3

    -Yashwant

  • Yes it is 3.3.

    Regards,

    John

  • I can ping the control card now and can see the expression window update. Thanks! I connected my control card to my router and my Pc also to my router. I am on windows 10 and didn`t use a static IP address. I obtained it automatically

    I am now trying to run the tcpechoexample in the same way but I get "could not open socket". What could be the reason for this?

    Which config file should I use for tcpecho?

    Regards,

    John

  • Is the ndk properly installed and the path variables are correctly set? I hope you are following the instructions in the readme.md file for that project at location C2000Ware_3_03_00_00\libraries\communications\Ethernet\ti\ndk\examples\tcpEchoF2838X .

    Attaching the same for reference.

    Can you also refer to this thread and see if it helps https://e2e.ti.com/support/microcontrollers/c2000/f/171/p/955674/3535204

    ---
    # tcpecho
    
    ---
    
    ## Example Summary
    
    This application demonstrates how to use TCP.
    
    ## Peripherals Exercised
    
    * `EMAC`      Connection to network
    
    ## Resources & Jumper Settings
    
    This example needs the 
    1. C2000Ware Package
    2. SYS/BIOS 
    3. XDC Tools
    4. Network Developer Kit(NDK)
    5. Network Services (NS)
    
    Please refer to the C2000Ware Quick Start Guide 
    (available at http://www.ti.com/tool/C2000WARE) on where to source them for 
    F2838X device.
    
    Before compiling please set the following Environment variables in windows
     NDK_INSTALL_DIR= <NDK Install location>
     NS_INSTALL_DIR= <NS Install location>
     C2000WARE_INSTALL_DIR=<your C2000 driverlib install location>
    Example:
     NDK_INSTALL_DIR=C:\ti\f2838xSDK\ndk_f2838x_3_61_00_08_eng
     NS_INSTALL_DIR=C:\ti\f2838xSDK\ns_2_60_00_07
     C2000WARE_INSTALL_DIR=C:\ti\c2000\C2000Ware_2_00_00_02
    
    Python 3.X is required for this example. To install python download the latest
    version at https://www.python.org/downloads/release
    
    ## Example Usage
    
    * Connect an Ethernet cable to the Ethernet port on the control card and connected
    other end to a PC. 
    
    * The device must be connected to a network with a DHCP server to run this
    example successfully.
    
    * The example starts the network stack. When the stack receives an IP address 
    from the DHCP server, the IP address is written to the console. 
    Use the CCS Run Time Object View -> SysMin -> Output Buffer to view the 
    IP Address acquired by the device from the DHCP Server.
    
    
    * Run the tcpSendReceive python script on the PC
    
    Usage:
    
    ```
    python tcpSendReceive.py <IP-addr> <port> <id> -l[length] -s[sleep in mS] -n[number of transmits per report]
    
      <IP-addr>     is the IP address of the device
      <port>        is the TCP port being listened to (1000)
      <id>          is a unique id for the executable. Printed out with a packet transmission report.
                    It allows the user to run multiple instances of tcpSendReceive.
    
    
      Optional:
        -l[length]      size of the packet in bytes. Default is 1024 bytes.
        -s[sleep in mS] usleep time to between sends. Default is 0 mSecs.
        -n[number of transmits per report] the number of transmits to occur before being reported onto the console. Default is 100 transmits.
    ```
    
      Example:
            **python tcpSendReceive.py 192.168.1.100 1000 1 -s100**
    
    * Messages such as the following will begin to appear on the terminal window when a TCP packet has been echoed back:
    ```
            Starting test with a 100 mSec delay between transmits and reporting every 100 transmit(s)
            [id 1] count = 100, time = 10
            [id 1] count = 200, time = 20
            [id 1] count = 300, time = 30
    ```
    
    ## Application Design Details
    
    * This application uses two types of tasks:
    
    1. **tcpHandler** - Creates a socket and accepts incoming connections.  When a
                      connection is established a **tcpWorker** task is dynamically
                      created to send or receive data.
    2. **tcpWorker**  - Echoes TCP packets back to the client.
    
    **tcpHandler** performs the following actions:
       * Create a socket and bind it to a port (1000 for this example).
       * Wait for incoming requests.
       * Once a request is received, a new tcpWorker task is dynamically created to
         manage the communication (echo TCP packets).
       * Waiting for new requests.
    
    **tcpWorker** performs the following actions:
       * Allocate memory to serve as a TCP packet buffer.
       * Receive data from socket client.
       * Echo the TCP packet back to the client.
       * When client closes the socket, close server socket, free TCP buffer memory
         and exit the task.
    
    * TI-RTOS:
    
        * When building in Code Composer Studio, the kernel configuration project will
    be imported along with the example. The kernel configuration project is
    referenced by the example, so it will be built first. The "release" kernel
    configuration is the default project used. It has many debug features disabled.
    These feature include assert checking, logging and runtime stack checks. 

  • Here is some images of what I have:

  • The Output buffer is not updating:

  • Ok I have the buffer saying something but what do I execute in python?

    This? 

    python tcpSendReceive.py 128.95.196.178 1000 1 -s100
    I get "could not open socket"
    Regards,
    John
  • Instead of python script can you test with a normal ping request and check the packets with wire shark to see if there is any interaction with device.

    Regards,

    Yashwant