Other Parts Discussed in Thread: LMK04832
Can the PLLatinum tool simulate multiple devices that are chained together to calculate the Integrated Noise?
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Other Parts Discussed in Thread: LMK04832
Can the PLLatinum tool simulate multiple devices that are chained together to calculate the Integrated Noise?
PLLatinum Sim supports this, provided you model each stage one at a time.


As a full example, here is a complete modeling of the LMK04832 noise, using a 19.2MHz OCXO trace I found somewhere on my desktop as the reference source, a 122.88MHz VCXO in PLL1, and a 491.52MHz output at PLL2.
Input trace (PLL, VCO, distribution path noise disabled; loop filter set to infinite bandwidth; Fout = Fvco = Fpd = Fosc = 19.2MHz):

PLL1 trace with 122.88MHz VCXO:

PLL2 trace with exported PLL1 output fed into PLL2 OSC load data:
