Good morning
I wanted to know if it was possible to create a capacity whose value is modified over time in a linear or sinusoidal manner?
I wanted to use variable capacity, but it doesn't seem to do it. I don't know if it's feasible with verilog, and how to go about it.
I don't want it to be the voltage across a nominal capacity which varies the capacity in an equivalent manner.
Thank you all,
Have a good day
