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PMP22650: PMP22650 Simulation control logic doubt

Part Number: PMP22650

Tool/software:

I was exploring the control loop of CLLLC, and I have a few queries. Please help me with clarification.
1. On the secondary side of CLLLC, there is one block named Simple SR-Driver connected between the drain and source of each secondary side mosfet. Inside that block, what is the logic for VSD_ON, IOFF reference? Why have its values 1V and 5A been taken as references?
2. In the IOFF comparator, IOFF is connected at a non-inverting pin of the comparator. So the output should be logic low for greater than 5A of sense current, but in simplis it is behaving differently.
Please find the attached screenshot.
  • Hi Prakash,

    Thanks for reaching out, I have looped an engineer who will be able to comment on the questions you raised about the design's Simplis model.

    Best,

    Jackson

  • The block works the following way:

    1. If the source to drain voltage is above Von, the SR is told to turn on.
    2. If the source to drain current is less than Ioff AND the SR is on, the SR is told to turn off.
    3. One-shots are used to prevent retriggering until the conditions for turn on/off are removed and reapplied.
    4. The values were selected based on expected performance. I have not gone back and tunned these values to match the real circuit behavior. Feel free to select values that better represent the behavior of your system.