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TIDA-00917: Sizing BASE resistors for Gate Driver BJT based Current Buffer/Booster

Part Number: TIDA-00917

Tool/software:

In the TIDA-00917 reference design (https://www.ti.com/tool/TIDA-00917), in order to increase the current capacity of the gate driver ICs, a BJT totem-pole current buffer is used.

I understand that the source/sink peak currents are determined by the external resistances connected in series with the Gate terminal of the IGBT. However, I don't know how to size the base resistors (R5, R6) for the BJTs.

As I understand it, in this application, we want the BJTs to operate in the saturation region, which is considered as a voltage source and hence allows fast charging of the input capacitance of the IGBT. In other words, the active/linear region of the BJTs in the current buffer/booster must be avoided. To achieve this, we will try to reduce their base resistors to ensure that the BJTs always operate in the saturation region for a given gate-source drive voltage.

  1. Could you please explain how to calculate these resistors?

  2. Moreover, why was a 0.3-ohm resistor (R36) placed between the NPN BJT (Q1) and the driver power supply rail?

  • Hi Minh,

    In order to make sure these BJTs to wirk in saturation region, we need to check their related spec.

    From this diagram we know it needs at least 1000mA base current to keep the Vce at low level at 8A collector current.

    In this design the Ic peak is expected to be 8A source and 9A sink. Refer to equation (2) and (3) in page 8 of the design guide.

    Thus the designed Ib is a little below 2A here to meet it. In fact, you can adjust it in a rather wide range beside 2A here. For example, 1.5A~3A.

    Note that when you change it, you may also need to adjust the soft-off circuit of R10 and C39 for proper SCP performance.

    As for the 0.3-ohm R6, in helps to make the source current to be a little lower than the sink current of the IGBT gates, which is a common action in driving an IGBT.

    Best regards,

    Jerome Shan

  • Hello Jerome,

    Thank you very much for your detail answer.

    You have mentionned that we should change the R10 and C39 for proper SCP performance when changing the Base current of BJTs. However, as stated in one of your document, the value of these components depend  only on the Soft-Turn OFF (STO) discharge time as well as gate drive voltages (see photo below). Could you please explain to me in detail about this point ?

    Please reference to the 2nd & 3rd figures for the next 3 questions:

       1. Should do we place a Schottky diode in parallel with the npn BJT to protect it from overvoltages ? (as recommended in your document: https://www.ti.com/lit/an/slla472a/slla472a.pdf?ts=1743478842982)

       2.  In the same document, you also recommend connecting a resistor (from 50 to 100 ohms) between the BASE and EMITTER of the BJTs in order to have effective gate driver voltages close to the nominal value of power supply rails ? In the schematic of the TIDA-00917, should I do that as presented in the 3rd photo ?

       2. What is exactly the role of the capacitors C26,C27 ? Are they decoupling capacitors ? How can we calculate them ?

    Best regards,

    Minh.

  • Hi Minh,

    0. Yes, R10 and C39 are used to adjust the soft turn-off during SCP processing and thus impacts on the SCP performance.

    1 and 2. I think these practices are no problem.

    3. We may see them as decoupling capacitors to help remove input noise and layout related switching noise. Both are hard to determine in advance, except for testing on a real board, and thus we cannot calculate it beforehand. Better leave a footprint on board in design and then adjust it according to debug result, if necessary.

    Best regards,

    Jerome Shan

  • Hi Jerome,

    Thank you very much.

    Best regards,

    Minh Nhut NGO