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PMP41081: HHC performance information

LEON YAN
Expert 4330 points

Part Number: PMP41081

Tool/software:

Hello e2e,

Our customer is evaluating PMP41081 solution, they have a question about the HHC, if the voltage loop is running at 30-60KHz, even lower, how about the HHC performance in this design? the 150-250KHz frequency is difficult to be implemented in real application.

the CLB part in this solution is not well documented, does there have any other information to describe it?

And in the CCM TotemPole PFC and Current Mode LLC Reference Design, it seems the burst mode is not finished yet, is it right?

Thanks.

LEON

  • +1
    TI__Expert 7050 points

    Hi,

    Control bandwidth is generally 1/10th of the control frequency, and when you use lower control frequency, the control delay will be increased same and effect the control loop. But, the bandwidth won't effect much, with 100kHz voltage loop.

    Please see below introduction on the CLB logic,

    the question 3, that function is a footprint of history code, and no longer be used in the solution. Our burst mode is realized by below code in the ISR3()

    if (LLC_control_pu <= 0.2)
    {
    LLC_db_cycle = 800;

    }
    else
    {
    LLC_ramp_max = LLC_control_pu* (LLC_IRAMPMAX_SET_RATIO);
    LLC_db_cycle = LLC_DEADBAND_MIN;
    }

  • 0 in reply to Desheng, Guo
    TI__Expert 4330 points

    Hi DeSheng,

    Got it, Thanks for your help in this issue.

    LEON