LMG3422EVM-043: Need help to debug fault issue

Hi Gautham, 

It is possible that shoot-through is being observed. How are the HS and LS PWM signals being provided - is there a separate signal for each or do you have a dead-time generating circuit?

I would recommend to start off by increasing the dead-time to 100ns from HS-LS and LS-HS and observe if there is any difference in the input voltage that causes the faults. Please report back on the status of this. 

Thanks,

John

The HS and LS pwn are provided using a pico controller externally. Yes there is a separate signal for each. 

Sure, I can try to increase the deadtime as well.

Sounds good

Hi John, 

I increased the dead time and still see the same issue. 

I have also tried shorting the RDRV pin to 5VLDO and still see the same issue. Can you please review the design to see if anything stands out? Plesae suggest any other steps I can take to debug this issue.

Hi Gautham, 

What was the deadtime increased to? Can you share the waveforms after probing right at the HS and LS input pins? 

After increasing the deadtime, does the dropout voltage increase?

To About 100ns. Here are the wave forms at the Ls and Hs pins:

showing dead time:

At 140V input, the output voltage is ~50.6V out. The cycle begins skipping right after a few seconds. I am operating this at No load. Is it possible that the converter is operating in DCM?

I probed the temp pins, and found that the Bottom Fet was getting hot and the duty cycle became DC at the moment it skipped cycle. I do not have a load connected at the moment. I am switching it at 1 MHz.

As I load it, I notice the top fet begins to get hotter and throws the same fault. I have a fan directed at it but it does not seem to have a huge effect. What else can I do here?

It shouldn't be overheating with no load. Can you probe the inductor current to confirm CCM operation and if there is any shoot-through event?

I am not able to probe the inductor current. How can I monitor for shoot through?

Are you sure it would not overheat when switched at 1Mhz? 

I do have a fan blowing over the board: 

Is there an issue with my layout and positioning of the thermal vias under the FET? Could you take a look at the design files and let me know?

1MHz operation should not produce overheating with no load. Having the inductor current is crucial to debug what could be going on. Can you add a wire between one inductor terminal and the board to measure the current with a hall effect probe?

Could you also measure the isolated bias supply voltage under these conditions?

I am using a flat wire, through-hole part. I'll try something to capture this. 

John, in the user guide for LMG342X-BB-EVM, what is the switching frequency at the described 4KW operation?

I found this document from TI, this is the thermal evaluation of the same GAN fets at 4KW.

https://www.ti.com/lit/an/snoaa61a/snoaa61a.pdf?ts=1746588467568&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLMG3425R030%253FkeyMatch%253DLMG3425R030%2526tisearch%253Duniversal_search%2526usecase%253DGPN

On page 13, at 4us per division, I counted 2.5 divisions for 1 switching cycle. It appears to be switching at 100 KHz.

What is the recommended switching frequency for high power applications with this device?

Hi Gautham, 

The EVM is tested at 100kHz. 

The maximum switching frequency supported by the internal gate driver of LMG3422 is 2.2MHz.

There is no recommended switching frequency for this device - there is no straightforward answer for this question as this is a designer's decision and largely mandated by the application requirements. 

As mentioned before, there should be no issue in operating these devices at 1MHz, especially under a no-load condition. Let's look into the inductor current to identify if there is any shoot-through that's causing the devices to overheat and enter a fault state.

Thanks,

John

Thanks John. I will work on getting the inductor current waveform. Maybe one more relevant piece of information is that I do not have a heatsink/thermal interface attached or mounted on the board at the moment. I have ordered some heatsinks to test with. Do you think that could be a contributing factor to overheating? or do you still expect the Fets to not overheat on account of all the vias present?

Hi Gautham, 

The heatsink becomes important when testing at higher power levels in which the power losses in the GaN devices begin to exceed a few watts. Like I've mentioned before, I don't expect any sort of overheating from a no-load condition in the buck converter. 

Hi John, 

As requested, I captured the inductor current as well at 1Mhz fsw.

Vds = 0.

Ch1 = HS PWM, CH2 = Isw, Ch3 = LS PWM,

Vds = 100Vdc, no load.

Ch1 = HS PWM, CH2 = Isw, Ch3 = LS PWM,

In addition to this, I also tried to capture the same waveforms at a lower switching frequency. 

vds = 0V, no load:

vds = 100v, no load:

Hi Gautham, 

A few comments

These waveforms seem to indicate that there is very little deadtime between LS-HS and HS-LS, which is different than what was shown before. Please review the deadtime again and share with us. 

Also it seems like there may be a false turn-on event for the low-side device. 

Thanks,

John

Hi John, 

here are zoomed in versions of the PWM and the waveforms. 

On the second part, yeah it looks like the ground bouncing is causing a false trigger. 

If this dead time looks good to you, my next step is to get the PWM to 150Khz use the same dead time and see if I can deliver enough power. My goal is to get 3KW at 400V Vin and 100V vout. 

Can you set the deadtime back to 100ns, as you had shown in the previous waveforms? These new waveforms show the deadtime at 50ns, which is on the shorter side. 

You can try reducing frequency to see if the issue persists. 

I was able to get improved thermal performance when I added heatsinks. I am now able to output 1.4KW with forced airflow! 

I did want to ask you about the GND plane under the switches. I did have the same structure of thermal vias under the switch but I unfortunately did not remove masking from the bottom layer with the vias. Do you think it will be worth the effort to scrape the masking away from the bottom later and interface a heatsink to it?

Yes, this can yield better heat flow. A thermal interface material should be used. If the heatsink is covering both the HS and LS devices, ensure that the thermal interface material provides insulation between the two devices. 

Was the switching frequency reduced?