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PMP30446: Center Point Balancing and Feedback

Part Number: PMP30446
Other Parts Discussed in Thread: UCC28C50-Q1

Tool/software:

Hi Team,

Good day. I am posting this inquiry on behalf of the customer.

As part of my project, I'm designing a buck converter using a topology similar to the one in your PMP30446 reference design — a dual-buck configuration with a shared center point. Unlike PMP30446, I’m using the UCC28C50-Q1 PWM controller operating in peak current mode with fully isolated voltage and current feedback. The final application will run from a 1000 V battery and deliver 800 V at 12.5 A (10 kW).

After reviewing the PMP30446 schematic, I have a couple of questions:


1. How does PMP30446 achieve center point voltage balancing?

In the design description, it is mentioned that the center point balances automatically using a single coupled inductor (1:1). Could you please clarify how this works in practice?
Is there any special requirement in terms of layout or control strategy to ensure that the midpoint remains stable during dynamic operation or load transients?


2. What is the purpose of resistors R100 to R107?

In the schematic, I noticed a series of 1 MΩ resistors (R100 to R107). Could you explain their intended role in the design?


3. Can you elaborate on how the voltage feedback is implemented?

Could you briefly explain how the output voltage is sensed and processed for regulation in PMP30446?


Thank you for your help.

Kind regards,

Marvin

  • Hi Marvin,

    Please consider that we developed the reference design PMP30446 for a specific customer. They decided that this topology (developed by me) should have been patented and we did. So we have a joint patent between TI and this company. Anyway, every company is allowed to use this topology as long as they are employing TI parts.

    So, let's answer the three questions: 

    1) The topology is leveraging the fact we are using a coupled inductor. When one MOSFET is ON, and the second is not (because an imbalance in the driving signals or delay in the FET itself) the voltage applied to one winding is reported on the second winding and the second diode is producing a balancing current for the second half Buck. Maybe this concept is not easy to explain in few words, so if the customer has access to IEEE proceedings, they can download my presentation I made this year at APEC conference in Atlanta (GA, USA). In this regard, the can look for the presentation in industry session named "Split Inductor Self-balancing HV Buck". If they don't have access to it, I can send the presentation with you by email, but I am not sure we can share it with the customer if they don't have access to APEC proceedings.

    2) Meaning of all resistors R100 ... R107: this topology creates a floating Vout. After sensing Vout by means of R14 ... R25 and R15 ... R26, we create a small but continuous bias current that flows from the floating output to the ground. This bias unbalances the center point ("CNTR"), therefore R100 ... R107 are balancing this bias current.

    3) The voltage feedback is simply accomplished by differential voltage sense by U5A, while U8 is supplying a constant reference voltage and therefore provides a constant bias current into U5A, by means of R37.

    Please let me know if you want to forward the presentation to your customer, but in this case I believe it should be under NDA.

    Regards,

    Roberto