TXB0304: Receiver internal PU/PD resistors

Michael Grenader

Part Number: TXB0304
Other Parts Discussed in Thread: SN74AXC4T774

Tool/software:

Hey, i want to use the txb0304 for jtag interface to connect my jtag header to i.mx93 processor. I use shifter from 3.3v to 1.8v

The outputs from the LS are TDI, TCK and TMS and the output tdo is connected to the header through a buffer (NC7WZ17P6X)

In the data sheet it says:

Which means it better not to put external pu/pd resistors.

But the imx processor has internal pu/pd:

And the gpio parameter of the processor is:

So its it okay to use the txb0304 for my application? Or i should try a different level shifter (if so, any suggestions? Maybe the sn74axc4t774)

also can you show me the full guide on how you calculate if my parameters meet the requirements?

Thanks in advance

1 month ago

0 Tyler Townsend 1 month ago

TI__Mastermind 47278 points

Hi Michael,

Our expert who supports TXB products is ooo till Monday. Please expect a delay in response.

Regards,

Tyler

0 Jack Guan 1 month ago

TI__Mastermind 40076 points

Hi Michael,

I would recommend taking a look at the TXU0x04 for level shifting JTAG signals. The TXU is a fixed direction translator and its ch. are configured to be similar to JTAG/ SPI/ GPIO variations. Please let me know if any additional questions arise.

Regards,
Jack

0 Michael Grenader 1 month ago in reply to Jack Guan

Prodigy 130 points

Okay i will take a look at that device.

Any special considerations i need to take when connecting TXUx04 with i.mx93 processor as mentioned in the post?

Thanks

0 Jack Guan 1 month ago in reply to Michael Grenader

TI__Mastermind 40076 points

Hi Michael,

This app note should cover this topic from a high level: https://www.ti.com/lit/an/spradm1/spradm1.pdf?ts=1753803512702&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTXU0304

Regards,

Jack

0 Michael Grenader 1 month ago in reply to Jack Guan

Prodigy 130 points

Thanks.

One final question regarding the txb0304,

Regarding the initial state, If i supply VCCA and VCCB, and keep OE low (PD) and i control the OE using an fpga but i still keep the OE low, the outputs stay high impedance? Or only after t_disable time?

Im asking this because i connect one of the buffers output to I/O of a processor and there is a possible situation where the level shifter is on (OE low) and the processor is off

0 Jack Guan 1 month ago in reply to Michael Grenader

TI__Mastermind 40076 points

Hi Michael,

Michael Grenader said:
Regarding the initial state, If i supply VCCA and VCCB, and keep OE low (PD) and i control the OE using an fpga but i still keep the OE low, the outputs stay high impedance? Or only after t_disable time?

The state of the I/Os can be controlled via the OE pin. If it is driven low at any time, the I/Os will become disabled. Similarly, the device supports IOFF, where in the event one of the voltage domains (VCCA or VCCB) powers down and is at 0V, the I/Os are also placed in HIGH-Z state.

Regards,

Jack

Simulation, hardware & system design tools

Simulation, hardware & system design tools forum

TXB0304: Receiver internal PU/PD resistors