PMP11282: Support Required: Support Required – Issue with PMP11282 Rev A Reference Design

Hi Anand,

Can you confirm if you are using the same magnetics as I used in PMP11282? I did no load test and no overshoot at the output was observed. Please refer to PMP11282 test report. Also, the circuit (D506, R539, C536) will smooth the startup ramp to prevent overshoot.

In short, there might be some mismatch between the PMP11282 design and the board you are testing.

Regards,

Sheng-Yang Yu

Dear Sir,

Yes, I have used the same reference design as PMP11282.

In comparison with the test report, I observed the following:

• My PFC output is regulating at 375 VDC, whereas the test report shows 384.02 V.
• My output is regulating around 20 V at 3 A load, whereas the test report shows 24.023 V.

 Can I try making D506 DNC and test the circuit?

 Additionally, I sometimes face startup issues on my PCB. Occasionally, it does not start properly and only gives about 6 V output, even though the PFC is regulating at 375 VDC.

For reference, here are the auxiliary (net names as per PMP11282) measurements on my board:

• 12Vs Net: 14.35 V
• 5Vs Net: 4.967 V
• 6V Net: 6.515 V
• 12V Net: 14.10 V

Please advise if the mismatches could be related to the startup circuit or if further tuning is required.

Best regards,
Anand Matta

Yes, you can try to DNP D506 to compare. Also, you should check transformer primary winding current to observe it's current level and operational frequency when you stuck at 6V. Is it hitting over current threshold?

Dear Sir,

Please find attached the DSO screen captures for the following scenarios:

1. Output at 20 V with load – Operating frequency observed: 162 kHz
2. Output at 32 V without load – Operating frequency observed: 344 kHz
3. Output at 6 V with load – Observed that the low-side MOSFET is not switching

In each case, I have measured the transformer primary winding current along with the switching waveforms of both the high-side and low-side MOSFETs. I did not observe significant deflections in the primary current waveform.

Kindly review the attached results and advise on possible causes or next steps.

Best Regards,
Anand Matta

The current doesn't make sense to me. You should see sinusoidal (heavy load) or triangle (light load) current shape. You need to find out why the current isn't as expected. 

Dear Sir,

Please find attached the DSO images with the current probe.
Earlier, I had captured the wrong channel.

AC input current: ~0.3 A (measured with clamp meter, before bridge rectifier)

DC output current: ~1.4 A @ 20 V (measured with clamp meter)

Kindly review and advise further.

BR,
Anand Matta

Hi Anand,

The waveform with load (20V) looks good to me. One possible reason for higher output at no load is the transformer and output rectifier parasitic capacitor is high causing the converter becomes uncontrollable. You might want to check if the winding stack up of the transformer causes the high intra-winding capacitance. Or the parasitic capacitance of the synchronous rectifier is higher than the original design. The other possible reason is that the opto-coupler U503 CTR ratio isn't high enough. Therefore the output voltage goes higher in order to provide enough current for the opto-coupler.

For the 6V output low-side FET not switching issue, you need to check the waveform while low-side FET is still switching. It is better if you can monitor the moment right before low-side FET not switching to see what protection it triggered to stop FET switching. 

Dear Sir,

Thank you for your detailed analysis and suggestions.

Regarding the optocoupler, I used TLP785GB (CTR range 50%–600%) in place of PC817X4NSZ0F, as the original part was unavailable. I hope this substitution is acceptable and not contributing to the issue.

For the 20V output, the converter maintains regulation under load; however, our target design voltage is 24V. Could you please advise why it may be limiting at 20V instead of reaching 24V under load conditions?

Regarding the 6V output, I have observed that if the converter is powered on with no load and then the load is connected afterward, it operates correctly. However, if started with load already connected, the low-side FET stops switching. I will further capture waveforms around the point just before the low-side FET stops switching to identify the protection mechanism triggering this.

Thank you again for your support and guidance.

Best regards,
Anand Matta

Hi,

The optocoupler CTR range I selected is 300%-600%. 50%-600% is too wide of range to cover. You need to find a part that has the same CTR range as in the original design.

I found another part should work in Digikey stock.

https://www.digikey.com/en/products/detail/onsemi/FOD817DSD/1050227

Please replace Optocoupler first to see if the situation changes.

Dear Sir,

 Please find the attached schematic for your review.
Kindly let me know if any changes are required.

TI Reference.pdf

The output feedback loop appears to follow a Type III compensator design; however, I noticed that the 21.5 kΩ resistor in parallel with the 2700 pF capacitor are additional components.

Could you please share the calculations for the pole and zero frequencies, along with the corresponding feedback component values (R515, C100, C529, C530, R534, R526)?
Please find the attached screenshot for reference. 

Also, could you clarify the purpose of the current sharing control—is it intended for parallel operation, constant current (CC) mode, or overcurrent shutdown?

 BR,s
Anand

Dear Sir,

Follow-up on LLC Converter Regulation and Startup Queries

In my previous posts, some of my queries were addressed, but a few remain unanswered. I would appreciate your help in reviewing and responding to all of them.

Query 1 – Startup Issue
After replacing the FOD817DSD, the converter powers ON successfully about 99% of the time, reaching 20 V output. However, in about 1% of the startup attempts, the output remains at  5 to 6 V, and the LLC lower FET gate signals are missing.
I suspect this might be a startup timing issue.
Would it be acceptable to increase C527 from 0.47 µF to 1 µF or higher to improve startup reliability?

Query 2 – Output Voltage Regulation
The output voltage currently settles at 20 V DC, even though the feedback network is configured as follows:

• R515: 21.5 kΩ
• R545: 2.49 kΩ

The TL431 reference voltage is measuring 2.076 V, which indicates the output is not reaching the expected 24 V.

To achieve 24 V output, I am considering reducing R545 from 2.49 kΩ to 2.0 kΩ. I tried to reduce the R545 from 2.49 kΩ to 2.0 kΩ. Still it is giving 20V output.

Best regards,
Anand Matta

Dear Sir,

Kindly follow up on my earlier post regarding the UCC25600D issue.

Please let me know if any additional details or waveforms are needed from my side.

Best Regards,

Anand Matta

Dear Sir,

The switching frequency of the LLC low-side MOSFET is observed to be 160 kHz.
I have verified the resonant tank components, and they are as per the reference design. Please find the attached DSO screenshot for your reference.

Currently, the following components are used as per the reference design:

• RLTI-1154
• RLTI-1149
• 121MPE473J (used instead of 121MPE333J in parallel with 121MPE153J)

Additionally, I have ordered B32653A7473J as an equivalent replacement for 121MPE473J.

Still output voltage is reached 20 V, the switching frequency is observed at 160 kHz.
Could you please confirm if this indicates a possible issue with the feedback loop?

Best regards,
Anand Matta

There is an external OVP circuit, you might want to remove R546 to see if OVP circuit is limit the voltage to go higher.

Dear Sir,

Please find the attached waveform. The converter is now providing an output voltage of 21.98 V.

Is it possible to disable or remove the over-current protection feature from the LLC switching IC?

Best regards,
Anand

Dear Sir,

I am now able to achieve a 24 V output after pulling the PHB pin of the PFC controller (UCC28063D) to ground.

However, at certain times the output settles at 6 V. In this condition, I observe four startup pulses from GD1 of the UCC25600D, after which the controller repeatedly generates a single pulse at the driver input. The same behavior is reflected at the MOSFET gate, and the output remains at approximately 6 V. please find the attached waveform.

I am not able to understand why the UCC25600D is operating in this manner.

Additionally, I am unable to test by disconnecting the SS pin due to high inrush current, or because the PFC stage is pulling the SS pin low.

To proceed with debugging, is it safe to temporarily disconnect the OC pin and test the controller behavior?

Kindly advise.

Best regards,
Anand