Hi,
we have need a reference design for ZCU102 + AFE7950EVM with following parameters:
- LaneRate = 7.3728Gbps, 4 channel tx/rx, 1 sample per clock
- setupParams.fpgaRefClk = 184.32
- sysParams.FRef = 184.32
- sysParams.FadcRx = 2949.12
- sysParams.FadcFb = 2949.12
- sysParams.Fdac = 2949.12*4
If you do not have it, could you please provide a JESD reference design for this settings?
Regards