Part Number: TMS570LC4357
Other Parts Discussed in Thread: TMDX570LC43HDK,
Hello all,
I am using mibSPI2 (connected to SD card) on the TMDX570LC43HDK. The project uses FatFS to manage filesystems and FreeRTOS OS.
The attached code (sd_card.txt) has all functions that touches the SD card (through mibSPI2). Initialization is done before FreeRTOS scheduler and any further operation is done by only one task. `sd_card_read_block` and `sd_card_write_block` are called by `disk_read` and `disk_write`, respectivaly, in diskio.c. Access to the peripheral is protected by a mutex.
I tested this code with 3 different cards:
- 32GB Lexar SDHC - Card is initialized, configured and R/W operations works well for around 30 minutes, after a while writing a block times-out and any further operation fails;
- 32GB SanDisk SDHC - Card is initialized and configured, R/W operations work but data written to disk does not match desired data (filesystem gets corrupted);
- 1GB no brand SDSC - Works fine for more than 3 days.
After a long time trying to debug my code I noticed that configuring SPI with Polarity=0 and Phase=0 actually configures the peripheral as SPI mode 1 (data latched on falling edge, switched on rising edge). Am I correct in this assumption?
SD card defines that communication through SPI should be done using mode 0 (aka mibSPI configured with Phase=1). However even on the example provided at https://git.ti.com/cgit/hercules_examples/hercules_examples/tree/Application/TMS570LC43x_HDK_SDCard_mibspiDMA/source/HL_mibspi.c the peripheral is configured with Phase=0:
/** - Data Format 0 */ mibspiREG2->FMT0 = (uint32)((uint32)0U << 24U) /* wdelay */ | (uint32)((uint32)0U << 23U) /* parity Polarity */ | (uint32)((uint32)0U << 22U) /* parity enable */ | (uint32)((uint32)0U << 21U) /* wait on enable */ | (uint32)((uint32)0U << 20U) /* shift direction */ | (uint32)((uint32)0U << 17U) /* clock polarity */ | (uint32)((uint32)0U << 16U) /* clock phase */ | (uint32)((uint32)249U << 8U) /* baudrate prescale */ | (uint32)((uint32)8U << 0U); /* data word length */ /** - Data Format 1 */ mibspiREG2->FMT1 = (uint32)((uint32)0U << 24U) /* wdelay */ | (uint32)((uint32)0U << 23U) /* parity Polarity */ | (uint32)((uint32)0U << 22U) /* parity enable */ | (uint32)((uint32)0U << 21U) /* wait on enable */ | (uint32)((uint32)0U << 20U) /* shift direction */ | (uint32)((uint32)0U << 17U) /* clock polarity */ | (uint32)((uint32)0U << 16U) /* clock phase */ | (uint32)((uint32)249U << 8U) /* baudrate prescale */ | (uint32)((uint32)8U << 0U); /* data word length */
Is the example from TI using the wrong SPI format or am I missing something else?


