Hey Folks,
Basic question about TINA.
How do I build a circuit with many of the same component such that I can update a value in one place to change the values throughout the network. For example, let's say I have 50 resistors in a circuit and I want to change the resistance of all 50, run a simulation, change the resistance of all 50 again, run another simulation, etc.
Thanks,
Shawn
Shawn,
TINA-TI doesn't allow you to have global parameters in the schematic editor. There are two ways to accomplish what you are trying to do:
Let’s start with option one first, say we need a voltage divider from node NA to node NB as shown below,
To obtain the netlist for this circuit, simply aks tina to export your schematic into a .CIR file. To convert your circuit into a .CIR, just follow the following steps.
You should get something similar to,
If you got to this point, you should have a very similar file apart from the .PARAM line that I added toI define my circuit parameters .You can go ahead and use as many .PARAM statements as you need. Pay attention to the curly brackets on R2, this tells the simulator to insert the value of Rx as the value for resistor R2. Now all you need to do is go to the “analysis” tab and you will be able to run all the same analysis you can run from the GUI. You should see the same dialogs for each analysis.
Option 2.
The cool thing about option 1 is that the effort is somewhat small but we cannot go back and use the schematic editor (i.e. GUI) to accomplish this we have to write a wrapper for our circuit known in the circuit world as macro or subckt. Macro and subckt are are basically the same as having hierarchy in the schematic editor, e.g. a 741 amp, we just grab it and use it without looking under the hood.
Referring to our little voltage divider, the netlist representation of this circuit will look like:
.SUBCKT V_DIVIDER NA NB
+ PARAMS: RA = 1K RB = 1K
R1 NA NB { RA }
R2 NB 0 { RB }
.ENDS
The PARAMS statement tells the simulator that RA and RB are external parameters or variables to this sub-circuit and we are defaulting them to 1K. Once the parameters are set, they will replace the variables encased in the curly brackets namely RA and RB.
** Note that I have used PARAMS and not PARAM, PARAMS are external variables while PARAM have local scope, i.e. they will only work inside the .subckt and .ends statement unless they are defined in a global scope.
The + sign before PARAMS is used and “line continues” so line one wraps into line 2.
Now the question is, how do I transform my circuit into a netlist?
Please see the following application note,
http://www.ti.com/lit/an/slva527/slva527.pdf
Feel free to post and your schematic and I’ll be glad to help you shoehorn the circuit into a box.
One important remark, you can also pass global parameters to subckts. For example, say you created a macro for the voltage divider we discussed earlier, now when you generate your netlist by using step 1, you should see what is know as subckt calls in your .CIR file, this is
XU1 Node1 Node 2 My_Voltage_Divider
+ Params: Rx = 1K
then, you can define global parameters in your .CIR file as .PARAM Rglobal = 100K and pass it as parameter to your subckt's
XU1 Node1 Node 2 My_Voltage_Divider
+ Params: Rx = { Rglobal }
I hope this helps.
-Marcos
