Kevin-san
>Just to clarify, your question is about why the trise/tfall times in the electrical simulation model are different than the amount seen in the bench data?
Yes. I would like to calculate the switching loss with the Tr/Tf.
The simulation result is different from actual result. (simulation : a few nsec. actual : about 40nsec.)
Hi Aiit-san
I understand the WEBENCH model does not have the thermal behavior However I think the actual power dissipation is more than simulation.
Please refer the simulation result.
http://webench.ti.com/appinfo/webench/scripts/SDP.cgi?ID=95F637CCF5449A07
Hi Akshay-san
Thank you for your comment. Yes. That is my question.
I calculated the switching loss at both condition(simulation and actual).
simulation(Pd IC) : 0.45W @Fsw=2.1MHz, Io=0.6A, Tf/Tf =2ns?, Vin=48V
actual : 2.4W @Fsw=2.1MHz, Io=0.6A, Tr/Tf = 40ns, Vin=48V
I do not know the actual Tr/Tf of the gate signal of internal MOSFET. However that loss is larger than simulation.
Also I do not know how much is the LDO loss at Vin=48V.
I talked with the customer about this. They asked us above same question.
Regards,
Koji Hamamoto