I am simulating TPS54478 successfully with default settings which have TSTOP=1.2ms. But my device needs to be simulated to 50ms and if I try to do that I get the error message "SIMULATION TIME LIMIT WAS EXCEEDED". .TRAN parameters TRES, TMAX and KCLTOL are default 10ns, I try changing them all to 100ns but get the same error. And more than ~100ns I shouldn't use since fsw is 1MHz.
I also wonder what TSTEP and KCLTOL do, I don't think they are standard SPICE directives.
My goal is to select preliminary values for compensation link so that my hardware won't oscillate, which would give me a good starting point when measuring and adjusting the loop in the lab. I was planning just to look at oscillations during startup. Even better would be to see Bode plots but I don't think that can be done?
It plots a graph (slowly) during the 8 minutes so it doesn't seem to diverge, just being slow.