The simulation time limit error appears when we run TPS53319 startup simulation.
What is this cause? and Do you have any solution?
Best Regards,
Kohei Sasaki
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Hi Sasaki-san,
Are you seeing this for a single design specification or for multiple design specifications?
An alternate would be to use TINA-TI to simulate this using the WEBENCH circuit.
Sasaki-san,
Simulation export to TINA-TI has now been enabled for TPS53319. You can give it a try.