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Webench simulation netlist errors when esr is not included in capacitor models

Steve Widener
Genius 11010 points

Other Parts Discussed in Thread: TPS43061

I ran a quick Webench design using the TPS43061 (9 - 15V in, 18V out @ 3A) and simulated a steady-state output - the output was as expected.

When I edited the schematic and changed the input voltage from the 12V nominal to 9V, the simulation would not run and indicated that I had netlist errors - specifically that there was - 0 ESR on the input capacitor. I checked the cap that was selected by webench and, in fact, there was zero for the ESR. Upon redesigning & selecting another input cap (this time with a non-zero ESR), the simulation runs fine.

I suggest either making sure our database has ESR for all caps or making an adjustment in the sim tool to accommodate zero ESR. Consider that the simulation ran fine until I edited the input voltage, only then did the netlist error appear.

Steve

  • 0
    TI__Mastermind 41310 points

    Steve,

    We will take a look at this issue and come up with a solution.

    As a quick work around, did you need to change the topology of the circuit or only the input voltage? You can change the input voltage in the simulation window and run the standard simulations with the new input voltage without using the Schematic Editor.

    Alternatively, you can replace the input capacitor in the Schematic Editor window with a custom cap and add a small ESR to it (or choose a similar value input cap that does have an ESR). I am hoping also that this was the only cap you would have to replace. The compensation caps may also show this issue.