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TINA/Spice/LM5122: Irregular Circuit Problem

Part Number: LM5122
Other Parts Discussed in Thread: TINA-TI

Tool/software: TINA-TI or Spice Models

I am having the same irregular circuit error that many others seem to have. I'm not sure why my circuit is giving me an irregular circuit error when I try to run a transient analysis. It specifically states "Component/Terminals: .T1 6". This doesn't make any sense to me, because net 6 isn't connected to T1, and neither T1 nor net 6, which is the IC's syncout pin, seem mal-formed when I export and view the netlist. Am I misunderstanding the error message?

Thanks,
PaulLM5122 Sepic.TSC

  • Paul,

    Something went wrong with the wiring. Just delete the component and the wire connecting it top LO. Then place it again and wire it up. This should resolve the irregular circuit.

    I got a convergence issue after that. I would recommend using a pulse input with a short ramp for Vin instead of a DC source to aid with convergence.
  • Hi Nikhil,
    How did you identify this fault? I'd like to be able to debug my own circuits in general. I also deleted both transistors and gate resistors, and I still get this error on one or the other of the transistors. I imported this spice model from OnSemi's PSPICE lib. IS that causing the problem? (Is the reference to 6 the node name inside the FET macromodel? That would make more sense, since that model does have a net named "6" between the gate resistor and BSim3 NMOS model.)

    Thanks,
    Paul

  • Hi Paul,

    Here was my thought process. Usually the Irregular circuit message is self explanatory (fro example, current source that is shorted, or voltage source that is left open, etc.). In this case, as you identified it did not make sense. So I thought something must have been correct. I looked at the FET model and it looked like something that was imported from outside into the tool (so that was my 1st suspect). I would have tried 2 things

    (1) delete component and wires, then place again and rewire >> This resolved the issue
    (2) If this did not resolve the issue, I would have imported the model again to see if something went wrong in the import process.
  • Thanks Nikhil,

    That makes sense. For now, I will try with some of the built -in FETs, and work on fixing my imported model as a separate task.

    Best Reagrds,
    Paul