I have few doubts regarding design
- There is no film/ceramic capacitor in the output across output and MOSFET source to reduce high di/dt loop area and reduce MOSFET stress. The VDS shared in the application note seems to be taken at low current. Though the output capacitor, MOSFET, diode area seems to be very optimized in the PCB, ESL of the capacitor is enough to cause voltage overshoot.
- In the PCB design, the control ground and power ground is connected at the output capacitor. I think it should be connected directly to the current sensor, better accuracy could be achieved and any ground offset/bounce between two points might cause erratic behavior.
What are your thoughts ?