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TIDA-01480: Power supply sequencing in TIDA-01480

Mikael Carlsen
Intellectual 270 points
Part Number: TIDA-01480
Other Parts Discussed in Thread: TPS65023, LM3881

Hi!
Regarding the TIDA-01480 design.
I wonder how the power-supply sequencing to the voltage supplies work. It is not documented in TIDUDN1B.
Im looking at the assembly variant 001 for Xilinx ZU2CG device.

In the schematics there are passive components to delay the on/off times for different enable signals on page 6.
I cannot figure out how the TPS65023 (U1) is enabled at start-up. VLDO2A_3V3 output is connected to VIO via an "0"-ohm resistor.
VIO feeds the nets on page 6 for different enable signals.
How is the output VLDO2A_3V3 enabled at power-on. Do I need an external enable to start-up?

Br Mikael

  • 0
    TI__Mastermind 30280 points
    Mikael,

    Thanks for asking such a great question here on the forum. You are correct.

    There are four options to provide power for VIO: VLDO2A_3V3, VDCDC3_A, VDCDC2_B, and VCC_1or2A.

    In order to sequence the entire board correctly, the enable signal (EN_SEQ_LDOA, EN_SEQ_DC3A, EN_SEQ_DC2B, or EN_SEQ_1or2A_Rail) for the rail that powers VIO must be pulled up to an always-on reference. The simplest way to achieve this would be to pull up the desired Enable signal to VRTC_A (net name changes to "VRTCLK_A" at the Samtec connector on page 7), but the true sequencing circuit would need to be on the "motherboard", as it will change depending on what FPGA/SoC/MPSoC is being powered.

    To test a full prototype, most or all of the pull-ups/RC delays (R87-R101, C99-C113, R102-R116) for Enabled on page 6 would be removed. A sequencer like the LM3881 or a dedicated "house-keeping" MCU would be powered by an always-on rail also (VRTC_A or _B) or by VIO and power-on the rails (VCC_PSINTLP, VCC_PSINTFP, etc) according to the Xilinx ZU#Ex datasheet. The sequencer or MCU outputs would drive some or all of the 15 Enable signals.


    Best Regards,
    Brian
  • 0
    Intellectual 270 points

    Thank's a lot for clearing this out!

    Br Mikael