This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PMP20127: Updated PMP20127 Design has Audible Noise How to Eliminate it?

Part Number: PMP20127


Hi,

We had made Same to same Eval Board reference Design for testing before size reduction of PCB for our use.

Input -12V DC from 12v/3Amp SMPS  (Design Range 9-125V)

Output-5V DC

Load -0.5 -3Amp 

Fault-Audible Noise 

Output Noise Level- 1Vpp, after LC Filter-0.4Vpp

Input Noise- Increased upto 4Vpp

Seeking Solution - for audible noise reduction

  • Hello,

    4Vp-p on a 12V input is quite excessive.  It's possible that there is an input filter instability.  Please provide the following to better assess the circuit operation:

    1.  Schematic

    2.  Input voltage oscilloscope waveform (please use a time scale that can show the audible frequency oscillation)

    3.  Output ripple measurement

    Thank you.