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TINA/Spice/SN74LVC1G125: Reducing ring from FPGA

Part Number: SN74LVC1G125
Other Parts Discussed in Thread: TINA-TI,

Tool/software: TINA-TI or Spice Models

I have an FPGA  sending data to a register. Currently, I have the FPGA connected directly to the register. There are 7 GPIOs consisting of a 6 MHz clock and 6 data pins all operating at 3.3v. When I look at the GPIO pins on the FPGA, I see a lot of ringing. See picture. A logical choice for me would be to use SN74LVC1G125 as buffers. I like this component because it has a push-pull capability of a lot of current(32 ma) and the input uses a Schmitt trigger.  Is this a very good component for my application? I want to mimic the input  and output in TINA. I may also want to clean up the input with a few pF capacitor to ground. Is there a model for this component?