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WEBENCH® Tools/LMH1983: how to generate 14.7456MhZ clkout1 from lmh1983?

jitendra yadav
Prodigy 170 points
Part Number: LMH1983
Other Parts Discussed in Thread: LMK03328, LMK03318

Tool/software: WEBENCH® Design Tools

Hi Sir/Madam,

  we are using lmh1983 with vcxo 27 MHZ. How can i generate clkout1 as 14.7456MHz?

1. Through i2c registers configuration can be generated if yes please provide the register details?

2. in hardware is any changes i have to do?

3.Loop Filter use and why?

  • 0
    TI__Mastermind 28560 points
    An apps engineer will respond on Monday.

    73,
    Timothy
  • 0 in reply to Timothy T
    TI__Mastermind 28560 points
    Hello,

    I'm afraid it is not possible to produce this frequency. The closes you could do is using PLL4 to generate a frequency of 98.304 MHz / 2^n where n = 0 to 15. So if n = 3, you could have 12.288 MHz.

    For more flexible configurations, consider something like LMK03318 or LMK03328.

    73,
    Timothy
  • 0 in reply to Timothy T
    Prodigy 170 points
    hI Timothy
    we have gone through datasheet from that we understood that by programming i2c register R(0x29,0x2A) and N (0x2B,0x2C) we can generate required frequency Correct me if iam wrong

    1. Consider hin frequency as 15.625 Khz
    2.R and P as 1
    3. And by programming n register with the 944(0x3B0) i guess we can generate correct me if i am wrong?


    Fout = (Fin*N)/(R*P)

    Bu=y using the above Formula
  • 0 in reply to Timothy T
    Prodigy 170 points
    Explain us Use of loop Filter?
  • 0 in reply to jitendra yadav
    TI__Mastermind 28560 points
    Hello Jitendra,

    So if you have 15.625 kHz reference. R & P = 1. And N = 944. Then then you will produce 14.75 MHz. You would have to populate a 14.75 MHz VCXO for this to lock. And PLL2, 3, and 4 would not work because you're not using a 27 MHz VCXO.

    However above you requested 14.7456 MHz. If you chose a 14.7456 MHz VCXO or 29.4912 MHz VCXO. You could produce 14.7456 MHz provided you can solve the equation Fin / R * N = 14.7456 MHz or 29.4912 MHz. However the GCD(15.625 kHz, 14.7456 MHz) = 25 Hz. Which means your phase detector frequency would have to be 25 Hz, meaning R = 625 and N = 589824. But since N is only a 15 bit register this cannot be achieved. Even if it could, I have some concerns about operating with such a low phase detector frequency.

    Are you trying to lock to a video signal, and therefore a PLL such as LMK03318 or LMK03328 is not a good solution?

    73,
    Timothy