Other Parts Discussed in Thread: TINA-TI,
Tool/software: TINA-TI or Spice Models
The specification sheet for the TPS709 states that the maximum value of the load capacitance should be less than 47uF. However, after downloading the Spice model from the TI website and instantiating a TPS70912 Macro, TINA-TI simulation shows almost no instability with over 1000uF on the load side. I'm loading the output with a 120 resistor (10mA load) in parallel with a current source that sinks 0 to 140 mA at a 25 Hz rate. I have a 3.3V source powering the regulator with 1uF on the input. Very simple circuit. I'm using 5 different capacitors since this is powering one load of a FPGA. I really only need 101uF for the FPGA, but since the spec sheet states a max of 47uF, I want to see the effect on stability and if we need a different regulator. Any comment would be appreciated.
