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TIDA-00792: External FET gate minimum current

Part Number: TIDA-00792
Other Parts Discussed in Thread: CSD13381F4

Hello TI experts,

I am considering TIDA-00792 for designing BMS for my device with following configurations.

Number of cells in series: 12

Cell max voltage             : 4.2V

Battery max voltage        : 50.4V

I have confusion regarding external FET circuit. The external FET is fed voltage through 10K ohm resistor. My question is, how much gate of FET need minimum current to turn ON or pull in saturation region.

I have calculated current with my application. When voltage across cell is 4.2 V then maximum current of about  0.21 mA can pass through 10 K ohm resistor. Is this calculation correct? Is it enough to put FET in saturation region? I know that FET is voltage controlled device but 0.21 mA is very less according to me. Kindly explain it

Thanks

Best regards

Imran Riaz  

  • Hello Imran,

    Thanks for the inquiry. You are correct that a MOSFET is a voltage controlled device. The saturation region is defined where Vds > Vgs - Vth and it is not dependent on the gate current. The time it takes to charge Vgs to Vth and higher is determined by the gate current. I was not involved in this reference design and will forward your inquiry to the appropriate engineering team.

  • Hi Imran,

    In the TIDA-00792 the gates of the power FETs are fed thorugh R12 for the charge FETs and R14 for the discharge FETs.  Each is 620 ohm.  Large power FETs typically have a large Ciss and need a small gate resistor to switch quickly.  

    The balance FETs such as Q6 do have a 10k gate resistor (R36). Ciss for the CSD13381F4 is 200 pF max, so the 10k resistor does not add significant delay to the switching and the 10k limits current through the zener diode during transients.