• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 38 subscribers
  • Views 352 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

WEBENCH® Tools/UCC21750: UCC21750 CBLNK time calculation

Poojan Patel
Prodigy 40 points

Part Number: UCC21750

Tool/software: WEBENCH® Design Tools

I had a question regarding CBLK timing calculation for 1400 V  IGBT ? is it different from MOSFET?  

  • 0
    TI__Guru**** 189401 points
    Hi, Poojan, CBLK is used to “blank” the DESAT function. It is basically used to filter the signal to prevent false triggers. So, you will probably need to tweak this value when you get your prototypes back. This isn’t something you can really calculate, it’s one of those trial and error things. You probably won’t need as much blanking time as IGBTs switch much slower than FETs. Let us know if you have further questions.