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WEBENCH® Tools/LMG1020: Spike issue for LMG1020

Part Number: LMG1020

Tool/software: WEBENCH® Design Tools

We have a case the number is CS0336910. Even if we talked about the problem, we could not get suitable answer. The case is below;

When we measure the ground panel, we have some spikes on the ground which has frequency same as input signal frequency.
The spike is very crucial issue. It is because that we have developing lidar prototype board so any spike on the ground will affect the whole system .

When we apply second method (simple R-C filter), we saw that the spike decrease as Vpp.

According to first solution of the LMG120 datasheet and this schematic, I should connect the PWM signal to the IN- and IN+ to the VCC, so this solution will solve our problem right? (Did not test)

If you say that we have to apply two solution together, we will design according to this way

We ask you the best solution to suppress the spike .

Also, in the datasheet GaN and ground pin is shorted and connect the ground via Rs. What is the ohm value of the Rs?
If the common-mode choke should be apply, can you send the schematic diagram of the LMG1020 system with the value of the passive components. What is the values of the passive components as RC and choke the frequency we apply is about max 100 kHz with 1-0.1 %Duty Cycle.

The answer is very crucial right now we are designing our prototype board, we have to design best way before sending to create PCB. 

These signals are the ground panel of the LMG1020. When we apply input signal as 61kHz, the spike occurs as input signal frequency. RC filter is also applied to the our design with 10ohm and 5pF RC.

  • Hello Ozanca,

    Thanks for reaching out.

    Our offices are currently closed due to US holiday.

    We will address your specific questions early next week when we're back in office.

    Regards,

    -Mamadou

  • Hello Ozancan, Can you please reload the image with attachment? it seems broken and unable to be seen on our side.

    Wei

  • Hi Mamadou,

    The schematic of our design as below;

    Our result and the spike on the ground plane are in the below picture;

    Best Regards

    Ozancan Ugur

  • Hello Ozancan,

    Thanks for the details.

    There appears to be ~400mVpp on the GND likely resulting from high di/dt in the application coupled with board parasitic. To overcome such transients, we recommend the mitigation techniques discussed in the d/s which will typically reduce the transients amplitude and duration to limit its impact in your design.

    For your specific case, depending on your application requirement, you may consider increasing the RC filter on input Rin =100-Ohms and Cin <=300pF as a first step. If no improvement, we may try tying IN+ to VCC and driving the IC with IN-. 

    I'd also suggest some placeholder gate resistor to control the dv/dt at the gate to limit the di/dt.

    Regards,

    -Mamadou