CC2652R7: Custom hardware BLE testing issue with TI SmartRF Studio

Hi Pratik,

The CC2652R7 is pin-to-pin compatible with the CC2652R1 so using the LAUNCHXL-CC26X2R1 as a reference should be fine.  Also, the device is recognized by Smart RF Studio so there is some form of XDS110 communication being achieved.  Are you using a Launchpad's XDS110 and how are you connecting the debugger to your custom hardware?  Are you able to connect and load firmware as expected when using Uniflash or CCS?  I recommend that you submit your design files to SIMPLELINK-2-4GHZ-DESIGN-REVIEWS if there is any doubts concerning the hardware stability.

Regards,
Ryan

Hi Ryan,

We are using Launchpad's XDS110 as debugger for our custom hardware and flashing is done using JTAG cable. We are able to flash simple peripheral example code using UniFlash but with CCS we are getting below error 

Cortex_M4_0: GEL Output: Memory Map Initialization Complete.
Cortex_M4_0: GEL Output: Memory Map Initialization Complete.
Cortex_M4_0: GEL Output: Board Reset Complete.
Cortex_M4_0: Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Trouble Halting Target CPU: (Error -2064 @ 0x0) Unable to read device status. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Trouble Halting Target CPU: (Error -2064 @ 0x0) Unable to read device status. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Trouble Halting Target CPU: (Error -2064 @ 0x0) Unable to read device status. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)
Cortex_M4_0: Trouble Halting Target CPU: (Error -2064 @ 0x0) Unable to read device status. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.4.0.00129)

Tools version which we are using for CC2652R7 are below

SDK - simplelink_cc13x2_26x2_sdk_5_20_00_52

CCS - 10.4.0.00006

UniFlash - 6.4.0.3394

Regards

Pratik 

Programming the device appears to be fine, but control of the JTAG interface for debugging is not currently operational.  Based on the description of errors seen in both CCS and Smart RF Studio 7, the issue appears related to the stability of the debug lines on the JTAG connection.  As suggested in the CCS error, you could try setting a lower TCLK frequency through the targetConfigs/CC2652R7.ccxml file, Advanced Setup -> Target Configuration -> TI XDS110 Debug Probe -> The JTAG TCLK Frequency (MHz).  Can you attach a picture of the connection between the LaunchPad XDS110 and your custom hardware?  I'll loop in the HW Support Team but I once again recommend that you submit your design for further review.

Regards,
Ryan

Hi Pratik,

Can you try the suggestion provided by Ryan of lowering the TCLK frequency and reporting back if there is a change in the behavior? As Ryan mentioned a picture of the connection would be very helpful. Has this design been used before with a CC26X2 device or this an entirely new design? Has this design been submitted for review previously? If not, then please submit a review request and provide this E2E thread in the email for better context.

Best Regards,

Jan