https://www.ti.com/jp/lit/ug/swcu185e/swcu185e.pdf
Hello
The technical reference manual states that the flash should be erased if more than 83 writes are to be performed on a single wordline.
We have created the following code using TI Driver to check the behavior in this case.
for(uint16_t count=0;count<256;count++)
{
uint8_t tw_buff = 0xFF;
for(uint8_t subcount=0; subcount<8;subcount++)
{
tw_buff = tw_buff & (~(0x01 << subcount));
ret_list2[count*8+subcount] = NVS_write(nvsHandle2, count, &tw_buff, 1, NVS_WRITE_POST_VERIFY);
}
}
This code sets all the bits in the wordline to 0 one by one.
The technical reference manual describes it as follows:
"If more than 83 write operations are performed before re-erasure, one may see unwritten bits in the row that are erased (in a logic 1 state) become programmed (change to a logic 0 state)."
Therefore, we expected NVS_STATUS_ERROR to be returned from some point by executing NVS_write() with NVS_WRITE_POST_VERIFY for every bit.
However, the result was that writing to all bits returned NVS_STATUS_SUCCESS and the flush value was written as intended.
Is there any misinterpretation?
