Hi team,
Here's the request from customer：
We now have an application that after using the SPI interface and ordinary GPIO initialization in the main processor to complete an external device, use the same pins in the coprocessor to control this peripheral, and then it will be mixed with the preemption of the main processor's control of the device, but I found that after calling the coprocessor initialization pin, the main processor cannot control these pins, and the SPI of the coprocessor also calls the exception. How can I make these two cores time-sharing common pin peripherals? Or does this chip support the use of this?
The following figure shows the SPI configuration of the main processor:
The following figure shows the SPI configuration of the coprocessor:
Can you please check this case?
Thanks and Regards,
Nick
