Hi TI team,
According to Optimum Load Impedance in Chapter 9 of the "CC13xx/CC26xx Hardware Configuration and PCB Design Considerations" document, there are the following problems,
Does our circuit meet the conditions of differential internal bias? If yes, do we have to satisfy 42+j21 Ω while verifying the load impedance?
Where should it be verified from (1 or 2 or 3) in the circuit? Please refer to the attached file.
Please kindly share your suggestions, thanks a lot.
Best Regards,
ChingShiuan