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CC2340R5: CC2340 crystal oscillator waveform output problem

Part Number: CC2340R5

I refer to the "ble_user_guide/html/ble-stack-5.x-guide/debugging-index-cc23xx.html?highlight=ckmd_o_dtbctl#undefined" document of SDK. The frequency of IO output crystal oscillator is used for factory verification of crystal oscillator. When clockSrc is set to 0x0f, IO output 32k square wave. When it is set to 0x0d, the output is 48M sine wave. Can this output square wave? Sine wave affects factory test. In addition, I want to change DIO19 to DIO21, but it failed. Can I change other IO

  • Hello,

    Outputting a square wave is not an option here. DIO21 should be ok to use. Alternatively, you can also use DIO18. If it doesn't work post your code and we'll help you spot the issue.

    Best regards,

    Bun

  •    Hello, I changed GPIO_setConfig and IOC_O_IOCxx to change 19 to 21. But the DIO21 has no output waveform. In addition, I want to output 48M square wave to IO, how should I configure it
     
        uint8_t clockSrc = 0xF;
        // // drive output low first
        // GPIO_setConfig(19, GPIO_CFG_OUTPUT | GPIO_CFG_OUT_LOW);
        // // Configure the IOC.IOC19.PORTCFG MMR to select DTB
        // HWREG(IOC_BASE + IOC_O_IOC19) &= ~IOC_IOC19_PORTCFG_M;
        // HWREG(IOC_BASE + IOC_O_IOC19) |= IOC_IOC19_PORTCFG_DTB;

        // drive output low first
        GPIO_setConfig(21, GPIO_CFG_OUTPUT | GPIO_CFG_OUT_LOW);
        // Configure the IOC.IOC21.PORTCFG MMR to select DTB
        HWREG(IOC_BASE + IOC_O_IOC21) &= ~IOC_IOC21_PORTCFG_M;
        HWREG(IOC_BASE + IOC_O_IOC21) |= IOC_IOC21_PORTCFG_DTB;


        // Make sure the DTB mux selects in IOC (and if required in
        // source clock IP) are reset that zero is driven on DTB0.
        // ULLSEL mux select (select CKMD)
        HWREG(IOC_BASE + IOC_O_DTBCFG) &= ~IOC_DTBCFG_ULLSEL_M;
        HWREG(IOC_BASE + IOC_O_DTBCFG) |= 0x1 << IOC_DTBCFG_ULLSEL_S; // 0x1 to route CKMD to DTB0

        // DTBx output enable
        HWREG(IOC_BASE + IOC_O_DTBOE) &= ~IOC_DTBOE_EN0_M;
        HWREG(IOC_BASE + IOC_O_DTBOE) |= IOC_DTBOE_EN0_EN;


        // select which clock (CKMD) to output on DTB0 (DTB[0])
        // 0h = Select CLKULL (24 MHz during ACTIVE, 32kHz during STANDBY)
        // 1h = Select CLKSVT (48 MHz)
        // 2h = Select CLKADC (48 MHz)
        // 4h = Select tracking loop reference clock
        // 7h = Select LFCLK (selected by LFCLKSEL.MAIN)
        // Ah = Select HFOSC after qualification
        // Ch = Select HFXT divided by 8
        // Dh = Select HFXT
        // Eh = Select LFOSC
        // Fh = Select LFXT
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) &= ~CKMD_DTBCTL_CLKSEL_M;
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) |= (clockSrc) << CKMD_DTBCTL_CLKSEL_S;

        // enable DTB output
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) &= ~CKMD_DTBCTL_EN_M;
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) |= CKMD_DTBCTL_EN;
  • At a glance, your code looks ok. Can clarify what did you mean when switching from DIO19 to DIO21 failed? Was the code hanging, the output was not right, etc? Keep in mind that a square wave is not possible as these GPIO pins have too much capacitance and the output level is too low to drive anything.

    Best regards,

    Bun

  • DIO21 pin can't see any waveform output。

    In addition, I don't need the driving ability of IO, which is connected to another MCU to detect the frequency (interrupt mode), and sine wave is not easy to detect. It only needs a waveform of 48M like 32K, which is 32K in Figure 1 and 48M in Figure 2.As shown in fig. 2, the 48M waveform also has a DC part.

  • So DTB0 is used for DIO19 and not DIO21. For DIO21, DTB15 would be used.

    What is 48MHz square wave intended for? Perhaps there another approach.

    Best regards,

    Bun

  • Hi,

    1、 I enabled DTB15 in the IOC_O_DTBOE register, but DIO21 still didn't output any waveform. Do you see if the following code can work normally? The IOC_O_DTBCFG register didn't find the relevant description, so it hasn't been changed.

        // drive output low first
        GPIO_setConfig(21, GPIO_CFG_OUTPUT | GPIO_CFG_OUT_LOW);
    
        // Configure the IOC.IOC21.PORTCFG MMR to select DTB
        HWREG(IOC_BASE + IOC_O_IOC21) &= ~IOC_IOC21_PORTCFG_M;
        HWREG(IOC_BASE + IOC_O_IOC21) |= IOC_IOC21_PORTCFG_DTB;
    
        // Make sure the DTB mux selects in IOC (and if required in
        // source clock IP) are reset that zero is driven on DTB0.
        // ULLSEL mux select (select CKMD)
        HWREG(IOC_BASE + IOC_O_DTBCFG) &= ~IOC_DTBCFG_ULLSEL_M;
        HWREG(IOC_BASE + IOC_O_DTBCFG) |= 0x1 << IOC_DTBCFG_ULLSEL_S; // 0x1 to route CKMD to DTB0
    
        // DTBx output enable
        HWREG(IOC_BASE + IOC_O_DTBOE) &= ~IOC_DTBOE_EN15_M;
        HWREG(IOC_BASE + IOC_O_DTBOE) |= IOC_DTBOE_EN15_EN;
    
    
        // select which clock (CKMD) to output on DTB0 (DTB[0])
        // 0h = Select CLKULL (24 MHz during ACTIVE, 32kHz during STANDBY) 
        // 1h = Select CLKSVT (48 MHz) 
        // 2h = Select CLKADC (48 MHz) 
        // 4h = Select tracking loop reference clock 
        // 7h = Select LFCLK (selected by LFCLKSEL.MAIN) 
        // Ah = Select HFOSC after qualification 
        // Ch = Select HFXT divided by 8 
        // Dh = Select HFXT 
        // Eh = Select LFOSC 
        // Fh = Select LFXT
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) &= ~CKMD_DTBCTL_CLKSEL_M;
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) |= (clockSrc) << CKMD_DTBCTL_CLKSEL_S;
    
        // enable DTB output
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) &= ~CKMD_DTBCTL_EN_M;
        HWREG(CKMD_BASE + CKMD_O_DTBCTL) |= CKMD_DTBCTL_EN;

    2、Where can I find the corresponding relationship between DIO21 and DTB15? For example, when I want to replace DIO21 with other DIOs, how can I know which DTB corresponds to? I think the pin mapping part DIO21 in the specification is DTB2. I also tried to enable DTB2, but there was no output.

    3、When leaving the factory, it is necessary to test the frequency of the two external crystal oscillators of the module. An MCU is connected to the DIO of CC2340. The MCU sends commands to CC2340, and CC2340 outputs 48M/32K and waveforms. MCU judges the quality of crystal oscillator by detecting the frequency of this waveform.

  • Hi,

    After some discussion with my team, some DTB can be transferred to other DIOs but it may not output the signal you are expecting.

    1. Try DTB0 on DIO12 and see if there's an output. If there's no output, then DTB0 is limited to DIO19.

    2. As for the square wave, try a 50% PWM at 48 MHz and see if you are ok with the result.

    best regards,

    Bun