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Original question:

CC2340R5: CC2340 Production Programming

CC2340R5: CC2340 Programming without nRST

Andrew Burgess
Prodigy 30 points
Part Number: CC2340R5
Other Parts Discussed in Thread: UNIFLASH,

Hi,

Up until now we have been using the UniFlash PC software and XDS110 Programmer to flash program the CC2340R5, we have been interfacing with the VDD, GND, SWDIO, SWDCK and nRST pins. However due to some issues with latest samples we no longer have easy access to nRST. Now when we try to program we get errors from Uniflash software. 

Therefore I was wondering is it possible to change the programming setup to work around not having access to nRST?

Thanks

Andrew

  • 0
    Prodigy 30 points

    When I try to program I get the following:

    [3/29/2024, 8:04:39 AM] [ERROR] SEC_AP: Trouble Writing Memory Block at 0x0 on Page 0 of Length 0x1: (Error -2130 @ 0x0) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 12.7.0.00059)
    [3/29/2024, 8:04:39 AM] [ERROR] Cortex_M0P: File Loader: Memory write failed: Target failed to write 0x00000
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: Debugging is not allowed. If this is not expected, check your CCFG.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: If you are experiencing issues with loading your application, do the following (this will erase the chip):
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - Code Composer Studio:
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - End the current debug session (if any is active).
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - View -> Target Configurations -> Right click on .ccxml file for your project -> Launch Selected Configuration.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - Right click on the 'Debug Probe/Cortex_M0P' and select 'Show all cores'.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - Select the 'Debug Probe/CS_DAP0' item after expanding the 'Non Debuggable Devices' item.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - Scripts -> CC23xx -> ChipErase to start Chip erase.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: - You should now be able to load your application to the target.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: Debugging is not allowed. If this not expected, check your CCFG.
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: Flash loading is currently not supported if debugging is not allowed.
    [3/29/2024, 8:04:40 AM] [ERROR] Cortex_M0P: Halting at entry of application is not allowed. Are you sure debugging is allowed?
    [3/29/2024, 8:04:40 AM] [INFO] Cortex_M0P: Running the application, without halting at the entry of the application.
    If I follow the instructions above to do ChipErase through CCS then I am able to program with UniFlash. Is there any risk with doing a ChipErase and if this step is required for me because of not having access to nRst is there a better way to do ChipErase? 
  • 0 in reply to Andrew Burgess
    TI__Guru**** 217397 points

    Hi Andrew,

    The reset line is necessary to keep the CC2340R5 at a well known state before attempting to flash it.  Programming may succeed by chance (like immediately after a power cycle or when using a blank device), but it is not guaranteed.  This is why TI programming tools such as Uniflash depend on the RST line to control the state of the connected device.  The instructions given in the prompt attempt a Chip erase through direct JTAG commands, which once again are not recommended if the device is in an unknown state.  Will Uniflash allow for a manual Chip Erase?  Uniflash session -> Settings & Utilities -> Manual Erase.

    Regards,
    Ryan

  • 0 in reply to Ryan Brown1
    Prodigy 30 points

    Hi Ryan, thanks for your reply and for detailing the importance of the nRST. On our design we we have included it and intend to use it however on a batch of samples we got, there is an issue with connecting to the nRST which is currently making programming these samples not possible. I just thought it was worth asking if there was a temp workaround if we only have access to VDD, GND, SWDIO and SWDCK. Uniflash does seem to allow for a manual Chip Erase but the response back is not clear if it was successful or not, this is what I see: 

    [4/2/2024, 8:32:22 PM] [INFO] Cortex_M0P: Flash loader: CC23xx_CC27xx_FLASH_LIBRARY_VERSION 3.18.0.5

    I noticed when setting up session in Uniflash there is options to select different connection settings, under the JTAG/SWD/cJTAG Mode: there is an option for cJTAG 2 pin advanced mode. Is this something that can be used?

  • 0 in reply to Andrew Burgess
    TI__Guru**** 217397 points

    The message shown is the only one that arises during a successful manual Chip Erase.  You can perform a Blank Check to determine whether it was successful.

    The CC2340R5 does not have any cJTAG, only SWD. so this is not an option.   Note that cJTAG on the CC13XX / CC26XX devices also requires a RST pin connection for programming.

    Regards,
    Ryan