CC2340R5: measure VBAT during CPU non active mode

Hi Oren,

What problem are you trying to solve here? Battery monitor may be configurable enough for your needs, but altering the clock dependency is not recommended.

Oren Fivlovich said:

1) Is there a way reading battery while CC2340R5 is in standby mode (but not reading value during active mode)?

Battery monitor driver source code is available (see <F3 install directory>/source/ti/drivers/batterymonitor/ .

Measurements are enabled by BatMonSupportLPF3_init, specifically with the register write HWREG(PMUD_BASE + PMUD_O_CTL) = PMUD_CTL_CALC_EN | PMUD_CTL_MEAS_EN | PMUD_CTL_HYST_EN_DIS;

There is no "*_deinit" function, so you would have to manually write to the register in active mode to disable measurements. Although I would not recommend it (due to no "_deinit" function having been tested).

What is the purpose of disabling measurements during active mode?

Maybe there could be an alternative solution using functions already existing.

For example, if you are concerned about false positives of the voltage drop when transitioning from standby to active, then adjust your thresholds accordingly (BatteryMonitor_registerNotifyRange).

Oren Fivlovich said:

2) During CPU active mode. What is the API/registers we can use in order to switch from 48Mhz ext' clock to to 32kHz clock?

In active mode, I recommend always be the 48MHz which is active. In standby mode, only 32kHz would be active.

Most (probably all) modules/drivers depend on this condition, and without it there will likely be unexpected behavior.

Thanks,
Toby

Hi Toby,

Problem trying to solve:
TI power load causing voltage drop-> lower VBAT readings.

One solution is reading VBAT while TI not in active mode. The battery monitor do that but if I understand correctly, we can't tell if the battery monitor low level triggered while we were in standby mode or it happened after TI wake up and VBAT wend down.

Second solution, try to reduce TI clock so the load will be lower, which in turn give less or non voltage drop while TI in active mode.
We plane doing that during TI power up, then do the VBAT measurement and finally configure to 48MHz clock and initialize all other functions.
by doing that time critical operations (for example BLE) should not be effected.

Thanks,

Oren
  

Hi Oren,

Oren Fivlovich said:

we can't tell if the battery monitor low level triggered while we were in standby mode or it happened after TI wake up and VBAT wend down.

Yes that's true, but you can set different thresholds (one prior to entering standby, and one after exiting standby) each with its own callback (only one will be active at a time). Then depending on which callback is entered and measuring current VBAT, you'll know if the BATT_BELOW_LL (below lower level) was triggered during standby or active.

An example of how to run code triggered by standby enter/exit can be found here: https://dev.ti.com/tirex/content/simplelink_lowpower_f3_sdk_8_20_00_119/docs/ble5stack/ble_user_guide/html/cc23xx/watchdog-timer-cc23xx.html#watchdog-example-code

Oren Fivlovich said:

Second solution, try to reduce TI clock so the load will be lower, which in turn give less or non voltage drop while TI in active mode.
We plane doing that during TI power up, then do the VBAT measurement and finally configure to 48MHz clock and initialize all other functions.
by doing that time critical operations (for example BLE) should not be effected.

Generally waking up from standby happens multiple times per power up... for example, even while BLE connection is active, there's a good chance the device will enter standby at some point. Then waking up from standby (and the associated battery voltage drop) will happen multiple times, even during time critical operations such as BLE connection event.

What system clocks run while in active is handled at a very low level (possibly even in HW), so it may not actually be possible to disable while in active mode.

Thanks,
Toby