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CC2340R5: 48MHz Oscillator Functions

Part Number: CC2340R5

Tool/software:

Hi TI Team,

I'm looking for the IC 48MHz Oscillator functional mode (VDD gain), is it :

-Variable gain without gain setting (software) ? for example > Loopcontrol function, gain switch function . . . (high gain for start up, reduced gain for steady state)

-Constant gain without gain setting (software) ? for example > Fullswingmode

-Constant gain with gain setting (software) ? for example > low, medium, high or Ampsel 00, 01, 11 . . . 

-Variable gain with gain setting (software) ? for example > low, medium, high or Ampsel 00, 01, 11 . . . (high gain for start up, reduced gain for steady state)

Can you tell me what is the gain/loop control is (strategy, timing etc.) ?

 

Secondly, when we do our process to calculate the oscillation margin of the 48MHz oscillator, if the resistor is too high, we notice that the oscillator starts with a significant frequency drift and it never sets up at the right frequency. What is this and why? Normally the oscillator won't start if the resistor is too high.

Finally, is there a minimum magnitude of the 48MHz oscillator to be respected for the µC PLL?

Have a good day,

Best regards,

Titouan

  • Hi Titouan,

    1. It is not recommended that the user change the oscillator gain or amplitude parameter as it can cause undefined issues.

    2. While it is possible it is not documented yet and the hardware designers typically set the related register fields through the API and not through a direct write.

    3. As for gain/loop control or minimum magnitude, it is internal to the hardware design team. I can inquire if you want, but what is the actual problem you want to solve because changing these parameters leads to more problems as the device is validated with these already set parameters?

    4. As for oscillation margin, what you're describing is the Rs_max when determining the maximum series resistance an oscillator can handle before it potentially stops oscillating. Your resistance may be on the edge of that max value.

    Best regards,

    Bun

  • Hi Bun,

    Thanks for the answers.

    Ok, so we will not change this parameter by software as you recommend.

    If you can ask the hardware design team, I would like to know:

    1 - If the gain is constant or variable and its mode. As exampled in the first two dashes of my previous message. (gain/loop control...)

    2 - What is the minimum value to be respected?

    I need this information for my oscillator supplier and their test, we probably will not change these parameters as you recommend.

    For your 4th point, it's for my personal knowledge, but why does the crystal drift when the resistance is on the edge of this max value ? It just stops oscillating in my previous design. Is it because the trimming capacitor is deactivated first?

    Thanks for your time.

    Best regards,

    Titouan

  • Hi Titouan,

    I will inquire about your first 2 questions.

    As for frequency drift, what you are seeing is most likely parasitic impedance affecting your performance. In this case, the parasitic capacitance is shifting your frequency, but this is expected and we have a feature in SmartRF 8 to tune the crystal.

    Best regards,

    Bun

  • Hi Bun,

    I missed clicking the "this solves my problem" button, but it doesn't.

    We have already adjusted the Q1 and Q2 parameters to compensate for the parasitic capacitance and to ajust the frequency of our oscillator (crystal). The phenomenon only appears when we have the resistance on the edge of this maximum value. I don't understand why. Is it because the trimming capacitors Q1 and Q2 stop working when the resistance is at the edge of this maximum value? So we're in a state where the oscillator works but the trimming capacitor doesn't? And when the resistance is at its maximum, they both stop working.

    Best regards,

    Titouan

  • If the oscillator works but the trimming caps does not, then how far off is the frequency? I am suspecting the parasitics from the board layout and resistance is too large for the trimming caps to affect the oscillator and this can be indicated by a large shifted frequency.. 

  • Hi Titouan,

    Here is there response:

    1. If the gain is constant or variable?
      1. variable
    2. What is it’s mode?
      1. parallel
    3. What is the loop control?
      1. digital
    4. What is minimum magnitude?
      1. 300mV

    Bun

  • Hi Bun,

    Thanks for the reply and Happy New Year!

    The response from your hardware design team is satisfactory for now. I'll reply to this thread if I need more information or details.

    For the oscillator frequency drift, the drift is about 16 ppm. I still suspect that the trimming capacitor stops working when the resistance is at the edge of this maximum value.

    Best regards,

    Titouan